From patchwork Tue Jun 13 13:05:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 775156 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wn9Fl2b8vz9ryb for ; Tue, 13 Jun 2017 23:14:03 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="bg6MIDHB"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3wn9Fl1PndzDqNp for ; Tue, 13 Jun 2017 23:14:03 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="bg6MIDHB"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from mail-pf0-x241.google.com (mail-pf0-x241.google.com [IPv6:2607:f8b0:400e:c00::241]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3wn94r0YkSzDqLd for ; Tue, 13 Jun 2017 23:06:20 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="bg6MIDHB"; dkim-atps=neutral Received: by mail-pf0-x241.google.com with SMTP id s66so6772401pfs.2 for ; Tue, 13 Jun 2017 06:06:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=zWHpqNb4Z0lVm4tCDv3rxzQRsl8ocjGKVw5p7Gd6vLE=; b=bg6MIDHBxKbXnqNRoFcZ1pbV5GhLpk9cpft9m/doU1GAC7gH69ZRkPgSJm5TPp+Pbc QGogPtqXhB0NBMffANGl83tAcLcAzwOypKIftuoytNKxZvI3WK0iFd3Kj6PFEfoTWKGe h2GyMAMdqq34gE3PEmp3t31WGSwT4sQ5hpl2aE/K5xDJuiLMrTR7PrSuHf0EAxdfbwLR W2Q/d+6YJR7goXtckvo91SGzXfhRoVNJqDzdXL0UyzZa0fxXV4sw5cOeofdVW45nXADK tgmwKHWy7jMXc7TH8XlBx+VbBbZ062UQuWD9p+e8HQEMleOJPYTv3FpLpoFCTH65Dpmy JNew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=zWHpqNb4Z0lVm4tCDv3rxzQRsl8ocjGKVw5p7Gd6vLE=; b=jfJ3OIRgvTyxwZlcM1CA62qKjYwTZPqppPmCgCnQnNkuXpxtil9TSu/ebCJQpye8g7 evB//EbprddxuuYSA9kKCLHeDdiYXsywg95TmAo1/NgmcAHJrTjKupLI0LRwu2W3jzB7 z2FQwGY9lxgAToLHWgBwzQjNF/CAbACFoAarSfvOziW3A9aRNZXN5cy8tqOB2p/5+8mp zmNQABXXMpy0RHCqqpCVfi6lxeQXXDLx3lbBo5lBRdjoDqQXyh2mbTDL0lLKNxaISv5K UOo5OwF5K+veob9+jhBvSF2ycTtDih3PfPDc5U69WjX/SM+Fjjgm85eoDP357NIpssxM kl0w== X-Gm-Message-State: AODbwcCXIcCNZxwTsYBjjo9L677udnn4c9/23vYXvMNSFbR3B6upXHUX 0PUDT4W/+JpVsJzy X-Received: by 10.98.33.84 with SMTP id h81mr59362301pfh.81.1497359178059; Tue, 13 Jun 2017 06:06:18 -0700 (PDT) Received: from roar.au.ibm.com ([210.185.119.63]) by smtp.gmail.com with ESMTPSA id y28sm27750667pfd.32.2017.06.13.06.06.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 13 Jun 2017 06:06:17 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH 03/13] powerpc/64s: idle process interrupts from system reset wakeup Date: Tue, 13 Jun 2017 23:05:47 +1000 Message-Id: <20170613130557.26315-4-npiggin@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170613130557.26315-1-npiggin@gmail.com> References: <20170613130557.26315-1-npiggin@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Gautham R . Shenoy" , Nicholas Piggin Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" When the CPU wakes from low power state, it begins at the system reset interrupt with the exception that caused the wakeup encoded in SRR1. Today, powernv idle wakeup ignores the wakeup reason (except a special case for HMI), and the regular interrupt corresponding to the exception will fire after the idle wakeup exits. Change this to replay the interrupt from the idle wakeup before interrupts are hard-enabled. Test on POWER8 of context_switch selftests benchmark with polling idle disabled (e.g., always nap, giving cross-CPU IPIs) gives the following results: original wakeup direct Different threads, same core: 315k/s 264k/s Different cores: 235k/s 242k/s There is a slowdown for doorbell IPI (same core) case because system reset wakeup does not clear the message and the doorbell interrupt fires again needlessly. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/hw_irq.h | 2 ++ arch/powerpc/kernel/irq.c | 29 +++++++++++++++++++++++++++++ arch/powerpc/platforms/powernv/idle.c | 10 ++++++++-- 3 files changed, 39 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h index f06112cf8734..8366bdc69988 100644 --- a/arch/powerpc/include/asm/hw_irq.h +++ b/arch/powerpc/include/asm/hw_irq.h @@ -32,6 +32,7 @@ #ifndef __ASSEMBLY__ extern void __replay_interrupt(unsigned int vector); +extern void __replay_wakeup_interrupt(unsigned long srr1); extern void timer_interrupt(struct pt_regs *); extern void performance_monitor_exception(struct pt_regs *regs); @@ -130,6 +131,7 @@ static inline bool arch_irq_disabled_regs(struct pt_regs *regs) extern bool prep_irq_for_idle(void); extern bool prep_irq_for_idle_irqsoff(void); +extern void irq_set_pending_from_srr1(unsigned long srr1); #define fini_irq_for_idle_irqsoff() trace_hardirqs_off(); diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index be32cec28107..76224869059d 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c @@ -348,6 +348,7 @@ bool prep_irq_for_idle(void) return true; } +#ifdef CONFIG_PPC_BOOK3S /* * This is for idle sequences that return with IRQs off, but the * idle state itself wakes on interrupt. Tell the irq tracer that @@ -379,6 +380,34 @@ bool prep_irq_for_idle_irqsoff(void) } /* + * Take the SRR1 wakeup reason, index into this table to find the + * appropriate irq_happened bit. + */ +static const u8 srr1_to_lazyirq[0x10] = { + 0, 0, 0, + PACA_IRQ_DBELL, + 0, + PACA_IRQ_DBELL, + PACA_IRQ_DEC, + 0, + PACA_IRQ_EE, + PACA_IRQ_EE, + PACA_IRQ_HMI, + 0, 0, 0, 0, 0 }; + +void irq_set_pending_from_srr1(unsigned long srr1) +{ + unsigned int idx = (srr1 & SRR1_WAKEMASK_P8) >> 18; + + /* + * The 0 index (SRR1[42:45]=b0000) must always evaluate to 0, + * so this can be called unconditionally with srr1 wake reason. + */ + local_paca->irq_happened |= srr1_to_lazyirq[idx]; +} +#endif /* CONFIG_PPC_BOOK3S */ + +/* * Force a replay of the external interrupt handler on this CPU. */ void force_external_irq_replay(void) diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c index f188d84d9c59..1028df82cd2f 100644 --- a/arch/powerpc/platforms/powernv/idle.c +++ b/arch/powerpc/platforms/powernv/idle.c @@ -302,7 +302,10 @@ static unsigned long __power7_idle_type(unsigned long type) void power7_idle_type(unsigned long type) { - __power7_idle_type(type); + unsigned long srr1; + + srr1 = __power7_idle_type(type); + irq_set_pending_from_srr1(srr1); } void power7_idle(void) @@ -337,7 +340,10 @@ static unsigned long __power9_idle_type(unsigned long stop_psscr_val, void power9_idle_type(unsigned long stop_psscr_val, unsigned long stop_psscr_mask) { - __power9_idle_type(stop_psscr_val, stop_psscr_mask); + unsigned long srr1; + + srr1 = __power9_idle_type(stop_psscr_val, stop_psscr_mask); + irq_set_pending_from_srr1(srr1); } /*