From patchwork Sun Jun 11 23:58:25 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 774406 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wmCsh66fQz9s4q for ; Mon, 12 Jun 2017 10:08:24 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="XcVUcEQl"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3wmCsh506JzDqL9 for ; Mon, 12 Jun 2017 10:08:24 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="XcVUcEQl"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from mail-pf0-x242.google.com (mail-pf0-x242.google.com [IPv6:2607:f8b0:400e:c00::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3wmChQ2X8LzDqLd for ; Mon, 12 Jun 2017 10:00:22 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="XcVUcEQl"; dkim-atps=neutral Received: by mail-pf0-x242.google.com with SMTP id y7so14693507pfd.3 for ; Sun, 11 Jun 2017 17:00:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=DV6zTqdpvg/GMflN2PIs37dS4WstTu7MNtTa/AtJpZo=; b=XcVUcEQli+VtrYbu9pChp5bhOp0QKSyz3kTS5I81aQC2VELNwTbnJxetmbamJYs5Ea ViwBq0imo0xhC76lykgLLuW9xBEXLswVpz5kEdcMe07D/IWYDl+1ZI75GvqpHhMlwQ9H 9q3cX1Q06+ScSpgknt8fgxW0RJp7N8fgcJs2MGULFidlhrYupZwIFZ7ID6nlc7vYZyCm 1vAgRfDXkFuEiDvqhk4Je4sk83A6F5i+7RIHWXzyjP6FbPQ0/Pj28tA2L0a7hHjr1eAI gRfhlK55CRQaCStYS3i0d21f5zhAu6NE/igi7c969V0oC60Bi5UNkW9sIOH9XzQzt9be zwUg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=DV6zTqdpvg/GMflN2PIs37dS4WstTu7MNtTa/AtJpZo=; b=j0iej2zabmL1ZVxaC/BYUdSgkXqACu52+pceZpYH0grCtcLxBJmFgZewsnZ/YpwX0T K7ZVyRvaXU5OMMRL3x8+HpN3g9RX61y21PpOOrjhl5/kCuX3FYqYpKcuAhDJhCb3dbD6 ZqJn2V9MeqeoeZEC1w9xopNnKNJ0zrdatTrk8UA8J5XAWEC3EzEt0MymbiplihGAkRV2 DWKdVsa7kRTgdAa6YE46gX37CY/sBdB5eqWVkh2WvgDV3w6kcqU7GvuSGPy4p/m/H7mn qE59MJ26wONE6PnGAMPc4meCtWn8HYumZfHGP06TjLBM6e4H02spPdf25qbaHY+gELnH 6ixA== X-Gm-Message-State: AODbwcCYNwCY85ghxmJk6ROw70W3DPxR5QiA2K7KOQ8VzGCx+yzFifGp eEIcewWJBT9f6wRI X-Received: by 10.84.236.71 with SMTP id h7mr52914124pln.86.1497225620133; Sun, 11 Jun 2017 17:00:20 -0700 (PDT) Received: from roar.au.ibm.com ([210.185.119.63]) by smtp.gmail.com with ESMTPSA id c14sm14427211pfk.42.2017.06.11.17.00.16 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 11 Jun 2017 17:00:18 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH 04/14] powerpc/64s: idle process interrupts from system reset wakeup Date: Mon, 12 Jun 2017 09:58:25 +1000 Message-Id: <20170611235835.7400-5-npiggin@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170611235835.7400-1-npiggin@gmail.com> References: <20170611235835.7400-1-npiggin@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Gautham R . Shenoy" , Nicholas Piggin , "Shreyas B . Prabhu" Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" When the CPU wakes from low power state, it begins at the system reset interrupt with the exception that caused the wakeup encoded in SRR1. Today, powernv idle wakeup ignores the wakeup reason (except a special case for HMI), and the regular interrupt corresponding to the exception will fire after the idle wakeup exits. Change this to replay the interrupt from the idle wakeup before interrupts are hard-enabled. Test on POWER8 of context_switch selftests benchmark with polling idle disabled (e.g., always nap, giving cross-CPU IPIs) gives the following results: original wakeup direct Different threads, same core: 315k/s 264k/s Different cores: 235k/s 242k/s There is a slowdown for doorbell IPI (same core) case because system reset wakeup does not clear the message and the doorbell interrupt fires again needlessly. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/hw_irq.h | 2 ++ arch/powerpc/kernel/irq.c | 25 +++++++++++++++++++++++++ arch/powerpc/platforms/powernv/idle.c | 10 ++++++++-- 3 files changed, 35 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h index f06112cf8734..8366bdc69988 100644 --- a/arch/powerpc/include/asm/hw_irq.h +++ b/arch/powerpc/include/asm/hw_irq.h @@ -32,6 +32,7 @@ #ifndef __ASSEMBLY__ extern void __replay_interrupt(unsigned int vector); +extern void __replay_wakeup_interrupt(unsigned long srr1); extern void timer_interrupt(struct pt_regs *); extern void performance_monitor_exception(struct pt_regs *regs); @@ -130,6 +131,7 @@ static inline bool arch_irq_disabled_regs(struct pt_regs *regs) extern bool prep_irq_for_idle(void); extern bool prep_irq_for_idle_irqsoff(void); +extern void irq_set_pending_from_srr1(unsigned long srr1); #define fini_irq_for_idle_irqsoff() trace_hardirqs_off(); diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index be32cec28107..d8a85768c8ec 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c @@ -348,6 +348,7 @@ bool prep_irq_for_idle(void) return true; } +#ifdef CONFIG_PPC_BOOK3S /* * This is for idle sequences that return with IRQs off, but the * idle state itself wakes on interrupt. Tell the irq tracer that @@ -379,6 +380,30 @@ bool prep_irq_for_idle_irqsoff(void) } /* + * Take the SRR1 wakeup reason, index into this table to find the + * appropriate irq_happened bit. + */ +static const u8 srr1_to_irq[0x10] = { + 0, 0, 0, + PACA_IRQ_DBELL, + 0, + PACA_IRQ_DBELL, + PACA_IRQ_DEC, + 0, + PACA_IRQ_EE, + PACA_IRQ_EE, + PACA_IRQ_HMI, + 0, 0, 0, 0, 0 }; + +void irq_set_pending_from_srr1(unsigned long srr1) +{ + unsigned int idx = (srr1 >> 18) & SRR1_WAKEMASK_P8; + + local_paca->irq_happened |= srr1_to_irq[idx]; +} +#endif /* CONFIG_PPC_BOOK3S */ + +/* * Force a replay of the external interrupt handler on this CPU. */ void force_external_irq_replay(void) diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c index e327e1585ddc..ee416e016387 100644 --- a/arch/powerpc/platforms/powernv/idle.c +++ b/arch/powerpc/platforms/powernv/idle.c @@ -302,7 +302,10 @@ static unsigned long __power7_idle_type(unsigned long type) void power7_idle_type(unsigned long type) { - __power7_idle_type(type); + unsigned long srr1; + + srr1 = __power7_idle_type(type); + irq_set_pending_from_srr1(srr1); } void power7_idle(void) @@ -337,7 +340,10 @@ static unsigned long __power9_idle_type(unsigned long stop_psscr_val, void power9_idle_type(unsigned long stop_psscr_val, unsigned long stop_psscr_mask) { - __power9_idle_type(stop_psscr_val, stop_psscr_mask); + unsigned long srr1; + + srr1 = __power9_idle_type(stop_psscr_val, stop_psscr_mask); + irq_set_pending_from_srr1(srr1); } /*