From patchwork Thu Jun 8 15:36:07 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 773349 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wk8nP5xWmz9s76 for ; Fri, 9 Jun 2017 01:42:33 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="uSExbjF3"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3wk8nP4yCKzDqPf for ; Fri, 9 Jun 2017 01:42:33 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="uSExbjF3"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from mail-pg0-x243.google.com (mail-pg0-x243.google.com [IPv6:2607:f8b0:400e:c05::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3wk8fJ1RSTzDqNQ for ; Fri, 9 Jun 2017 01:36:24 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="uSExbjF3"; dkim-atps=neutral Received: by mail-pg0-x243.google.com with SMTP id v18so4951049pgb.3 for ; Thu, 08 Jun 2017 08:36:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Zy/MKzOOsNeXx5RiTKSdaXCMRF3YYqhSshnNaeKbHz4=; b=uSExbjF3mU5pY1QNgYeBCTSmsZz9UwRpq7g0HrWBfadAdBFYFStHsIBFq0Uz5Wg3f6 JXpTBrkrwW7i1+Sv5hM6DDQc0ByLu7fR5u5qbN+wtooVFntt/Xc74b1T4iLhKygfK1zI O53AFH2N2M1AJLakLrijv3rIb05evtTGQFkpixcul6ZEy7pS/Sk/BU9ngdjdq67Pw4h+ n+PoMJf0kOX5MJdA3++5TeliwuRDHaa+x3LofOUS/6RiYSF7eKZDHay8CCKjlPLO1jbn nYBWGKZa9YILP/lfA8x4SawyoVnTYp9BDijUe59fszusu5yWS3gXQi9WCAsIc2LoCNjY 3lzA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Zy/MKzOOsNeXx5RiTKSdaXCMRF3YYqhSshnNaeKbHz4=; b=VthIQBvqLBZX9sI2BAk8Svazeim3A3LRuqgszbOykEj/38+Hihe0Jue0DUnRHROzq/ CMZ58S7DxpO72K7iyI55YzvjEx8y4azdK1zBz8HKks1dkrX2qsod07OjbYwi4T1fR8Uq 1qY5npFL/liDPW/I7pluDUM6Ci5ojxdX2B8PkJS32NlCVUXldnsrfAETG6wPjWIbDbPT Fde/QIoyI83Uqw/1gICT7aXD6gmElJhA54pHWLdG22afzTk4vfUuJH0tJAOdXfonVC6z uaXTWjvKnDOCDzQJ+QjVMOVWR38vjgjOBXl1L5wpz0r+vQ6WOstq4aDlLg1wBie91+qa IGjg== X-Gm-Message-State: AODbwcCJuCQA/dLHYdN324xQ3j7VavVs1odixsMStnCn1UUM+0CD4K5+ uzlmA3BCNklJd1q4 X-Received: by 10.84.202.163 with SMTP id x32mr19517592pld.112.1496936181612; Thu, 08 Jun 2017 08:36:21 -0700 (PDT) Received: from roar.au.ibm.com (14-202-185-133.tpgi.com.au. [14.202.185.133]) by smtp.gmail.com with ESMTPSA id q194sm10360445pfq.56.2017.06.08.08.36.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Jun 2017 08:36:20 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH 2/4] powerpc/64: context switch avoid reservation-clearing instruction Date: Fri, 9 Jun 2017 01:36:07 +1000 Message-Id: <20170608153609.19217-2-npiggin@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170608153609.19217-1-npiggin@gmail.com> References: <20170608153609.19217-1-npiggin@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nicholas Piggin Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" There is no need to break reservation in _switch, because we are guranteed that context switch path will include a larx/stcx. Comment the guarantee and remove the reservation clear from _switch. This is worth 1-2% in context switch performance. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/entry_64.S | 11 +++-------- kernel/sched/core.c | 6 ++++++ 2 files changed, 9 insertions(+), 8 deletions(-) diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index 91f9fdc2d027..273a35926534 100644 --- a/arch/powerpc/kernel/entry_64.S +++ b/arch/powerpc/kernel/entry_64.S @@ -521,15 +521,10 @@ _GLOBAL(_switch) #endif /* CONFIG_SMP */ /* - * If we optimise away the clear of the reservation in system - * calls because we know the CPU tracks the address of the - * reservation, then we need to clear it here to cover the - * case that the kernel context switch path has no larx - * instructions. + * The kernel context switch path must contain a spin_lock, + * which contains larx/stcx, which will clear any reservation + * of the task being switched. */ -BEGIN_FTR_SECTION - ldarx r6,0,r1 -END_FTR_SECTION_IFSET(CPU_FTR_STCX_CHECKS_ADDRESS) BEGIN_FTR_SECTION /* diff --git a/kernel/sched/core.c b/kernel/sched/core.c index 803c3bc274c4..1f0688ad09d7 100644 --- a/kernel/sched/core.c +++ b/kernel/sched/core.c @@ -2875,6 +2875,12 @@ context_switch(struct rq *rq, struct task_struct *prev, rq_unpin_lock(rq, rf); spin_release(&rq->lock.dep_map, 1, _THIS_IP_); + /* + * Some architectures require that a spin lock is taken before + * _switch. The rq_lock satisfies this condition. See powerpc + * _switch for details. + */ + /* Here we just switch the register state and the stack. */ switch_to(prev, next, prev); barrier();