From patchwork Tue Apr 18 19:12:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 751939 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3w6vzh0PD9z9s2x for ; Wed, 19 Apr 2017 05:18:08 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="TcQ/yE9X"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3w6vzg6SXCzDq9s for ; Wed, 19 Apr 2017 05:18:07 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="TcQ/yE9X"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from mail-pg0-x244.google.com (mail-pg0-x244.google.com [IPv6:2607:f8b0:400e:c05::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3w6vsS0nPVzDq8V for ; Wed, 19 Apr 2017 05:12:44 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="TcQ/yE9X"; dkim-atps=neutral Received: by mail-pg0-x244.google.com with SMTP id 34so337299pgx.3 for ; Tue, 18 Apr 2017 12:12:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=WytCQPI56R6ceIpaXc5Aihdj+RHzMNBTbjmwfPOb7Hs=; b=TcQ/yE9XVYbEjMxhmG0LdmFlM5GIIQQqmf8NfIqrx9IfEFpXLIwU4XWlYLQzt2Jh74 oCt/E5wTp2gfnUtkr3pElSMTkQcCtbYXK4sGxzeSX+CVYsPT89zFWhUfL/N2A2GFik/E i7Z2dlE1VWhu/f6MbJqRAtbzZiP6QTxoZnembemP9RUU3nxWi/zchGLUrwugRWuIXalS CP3JIif3fcvZr2Jjc9/xc9AJmLwiNl3Jwyt8fD6ZOqCbT9p7f8xBRxoMqwXBIiiRC39X wnLrihV86fqIoKJjC4JXGyO6QMDo95JmVsX8bkXfAbnrge2tp5+cvJqGKRpDpkuvEAVW qmhg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=WytCQPI56R6ceIpaXc5Aihdj+RHzMNBTbjmwfPOb7Hs=; b=nWcQK7BXjY094hu0/EHKjkIIGJa3z56xSsFxAaw8n/ocCP8lMaDCGhQLVRjYWAtEY1 WAmTIp60IpjjByN9dUQfGnXX98lhDSFJjMVF+9PvJ1/xyMN3xyTkdW7Ll2SS4WxUOaVG tLlTRRfSOGnjOD+CkFw606eGXTGULyE8z8gce0ME/OKCWKpMVlliQvqa3P7cZXE6T85D 5ErL/e5LltDYOruefNrIm/eSXki1Hgv5iZKX0AalJGzIU6KqT5lnJdpNopXwe3N1uv0b z7IzbpXIqN4y0YLCOgD1Q+OLvK7zmfJFXKYsdIW8C0zJhuFf5WI0lEO967TvhrYvyCjZ sIpQ== X-Gm-Message-State: AN3rC/4s4Pj8blIwnbFrrxhAuDybKuTUNOt1frt7C1HLZ1q1mzoA0sqC 5t/vT2R8AC886r4I X-Received: by 10.84.176.100 with SMTP id u91mr25252233plb.39.1492542761866; Tue, 18 Apr 2017 12:12:41 -0700 (PDT) Received: from roar.local0.net (14-202-189-126.tpgi.com.au. [14.202.189.126]) by smtp.gmail.com with ESMTPSA id 66sm66773pfg.14.2017.04.18.12.12.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 18 Apr 2017 12:12:40 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH 2/4] powerpc/64s: POWER9 no LPCR VRMASD bits Date: Wed, 19 Apr 2017 05:12:17 +1000 Message-Id: <20170418191220.3166-3-npiggin@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170418191220.3166-1-npiggin@gmail.com> References: <20170418191220.3166-1-npiggin@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nicholas Piggin Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" POWER9/ISAv3 has no VRMASD field in LPCR. Don't set reserved bits. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/cpu_setup_power.S | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S index 1fce4ddd2e6c..10cb2896b2ae 100644 --- a/arch/powerpc/kernel/cpu_setup_power.S +++ b/arch/powerpc/kernel/cpu_setup_power.S @@ -30,7 +30,7 @@ _GLOBAL(__setup_cpu_power7) mtspr SPRN_LPID,r0 mfspr r3,SPRN_LPCR li r4,(LPCR_LPES1 >> LPCR_LPES_SH) - bl __init_LPCR + bl __init_LPCR_ISA206 bl __init_tlb_power7 mtlr r11 blr @@ -44,7 +44,7 @@ _GLOBAL(__restore_cpu_power7) mtspr SPRN_LPID,r0 mfspr r3,SPRN_LPCR li r4,(LPCR_LPES1 >> LPCR_LPES_SH) - bl __init_LPCR + bl __init_LPCR_ISA206 bl __init_tlb_power7 mtlr r11 blr @@ -62,7 +62,7 @@ _GLOBAL(__setup_cpu_power8) mfspr r3,SPRN_LPCR ori r3, r3, LPCR_PECEDH li r4,0 /* LPES = 0 */ - bl __init_LPCR + bl __init_LPCR_ISA206 bl __init_HFSCR bl __init_tlb_power8 bl __init_PMU_HV @@ -84,7 +84,7 @@ _GLOBAL(__restore_cpu_power8) mfspr r3,SPRN_LPCR ori r3, r3, LPCR_PECEDH li r4,0 /* LPES = 0 */ - bl __init_LPCR + bl __init_LPCR_ISA206 bl __init_HFSCR bl __init_tlb_power8 bl __init_PMU_HV @@ -108,7 +108,7 @@ _GLOBAL(__setup_cpu_power9) LOAD_REG_IMMEDIATE(r4, LPCR_UPRT | LPCR_HR) andc r3, r3, r4 li r4,0 /* LPES = 0 */ - bl __init_LPCR + bl __init_LPCR_ISA300 bl __init_HFSCR bl __init_tlb_power9 bl __init_PMU_HV @@ -132,7 +132,7 @@ _GLOBAL(__restore_cpu_power9) LOAD_REG_IMMEDIATE(r4, LPCR_UPRT | LPCR_HR) andc r3, r3, r4 li r4,0 /* LPES = 0 */ - bl __init_LPCR + bl __init_LPCR_ISA300 bl __init_HFSCR bl __init_tlb_power9 bl __init_PMU_HV @@ -150,7 +150,7 @@ __init_hvmode_206: std r5,CPU_SPEC_FEATURES(r4) blr -__init_LPCR: +__init_LPCR_ISA206: /* Setup a sane LPCR: * Called with initial LPCR in R3 and desired LPES 2-bit value in R4 * @@ -163,6 +163,11 @@ __init_LPCR: * * Other bits untouched for now */ + li r5,0x10 + rldimi r3,r5, LPCR_VRMASD_SH, 64-LPCR_VRMASD_SH-5 + + /* POWER9 has no VRMASD */ +__init_LPCR_ISA300: rldimi r3,r4, LPCR_LPES_SH, 64-LPCR_LPES_SH-2 ori r3,r3,(LPCR_PECE0|LPCR_PECE1|LPCR_PECE2) li r5,4 @@ -170,8 +175,6 @@ __init_LPCR: clrrdi r3,r3,1 /* clear HDICE */ li r5,4 rldimi r3,r5, LPCR_VC_SH, 0 - li r5,0x10 - rldimi r3,r5, LPCR_VRMASD_SH, 64-LPCR_VRMASD_SH-5 mtspr SPRN_LPCR,r3 isync blr