From patchwork Wed Apr 12 17:48:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 750098 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3w3BMz4HtZz9s8V for ; Thu, 13 Apr 2017 03:52:47 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="RmmU8Tqc"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3w3BMz0K64zDq8B for ; Thu, 13 Apr 2017 03:52:47 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="RmmU8Tqc"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from mail-pg0-x244.google.com (mail-pg0-x244.google.com [IPv6:2607:f8b0:400e:c05::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3w3BHN5gzzzDq7h for ; Thu, 13 Apr 2017 03:48:48 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="RmmU8Tqc"; dkim-atps=neutral Received: by mail-pg0-x244.google.com with SMTP id o123so6727339pga.1 for ; Wed, 12 Apr 2017 10:48:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=oRdOT2fLrFVr1THKnGQvCSX13W68aQ97PupXIyyEQPU=; b=RmmU8TqcJmGpt5mXrrqYw7IBxW3BQUUENoFhTRmz4eJg4O+LNi8DfBvgAszgKtnFMI ZgmGSh08KXrCA4KLeEmT/IfgLVZqqiCkb6e82kMUeyTqy21hgfiatUTbK5/+BpUtFiK2 YSKtDLxuLMOXPWA0AaZVlCYwxPvUEgY4LggAIIlSws8YQQb8zSqmyQVomTeBk7A+rwDP liZHCTo0rIOcA8x6SyzyPuRquSItZjzyo4DfoVZN9eECIfnowpscQEa7lTpCNyb6Sqfd rWmOI8imi/0hVdlsm3EgzdY2p0pOjPLVCITqO7idTmCWiok+jVzqpbexfe/TF96EG4q7 2R1Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=oRdOT2fLrFVr1THKnGQvCSX13W68aQ97PupXIyyEQPU=; b=XzSDmXW2GPervMNQOb/ojWRjaRywEIWTaDnAgO41I2fQ77ktScNmZ545J/AjbeWx7W bYvAu0AUGf1+ZV7h43CC6ye3CPH4oocP229IwXgUVvgJobIcUpCuAbQLt1kf6P3O74vd 4ifU0HG2ejmgyojvrJr23xwfLTz1rB+JNh0a1nAq3u7C5tQ/bU6ZVkmKt3y6R7XjoPkE NdgJWthq0nSmfpulAEy5gBQEznjcmXFBt1i0j5IakIep8jtMtiaAsCwkJ648Z2NqR4qs roWZVmNQ0DtTr+0IcYqtoyawpchotwCl3nKlDLbWYi2MBSup02xbyWp6kIA4iYTDAw89 VL7Q== X-Gm-Message-State: AN3rC/48t4XKdhtN+lxWah76Xya2yuHHcYJMwEgg9endccezx14SBISZ7AZaPofg8LZCpg== X-Received: by 10.99.64.69 with SMTP id n66mr24156230pga.197.1492019326838; Wed, 12 Apr 2017 10:48:46 -0700 (PDT) Received: from roar.au.ibm.com ([203.221.48.234]) by smtp.gmail.com with ESMTPSA id y29sm21435722pfj.90.2017.04.12.10.48.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 12 Apr 2017 10:48:45 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH 1/3] powerpc/64s: POWER9 no LPCR VRMASD bits Date: Thu, 13 Apr 2017 03:48:30 +1000 Message-Id: <20170412174833.5924-2-npiggin@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170412174833.5924-1-npiggin@gmail.com> References: <20170412174833.5924-1-npiggin@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nicholas Piggin Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" POWER9/ISAv3 has no VRMASD field in LPCR. Don't set reserved bits. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/cpu_setup_power.S | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/arch/powerpc/kernel/cpu_setup_power.S b/arch/powerpc/kernel/cpu_setup_power.S index 7fe8c79e6937..3737685e1f54 100644 --- a/arch/powerpc/kernel/cpu_setup_power.S +++ b/arch/powerpc/kernel/cpu_setup_power.S @@ -29,7 +29,7 @@ _GLOBAL(__setup_cpu_power7) li r0,0 mtspr SPRN_LPID,r0 mfspr r3,SPRN_LPCR - bl __init_LPCR + bl __init_LPCR_ISA206 bl __init_tlb_power7 mtlr r11 blr @@ -42,7 +42,7 @@ _GLOBAL(__restore_cpu_power7) li r0,0 mtspr SPRN_LPID,r0 mfspr r3,SPRN_LPCR - bl __init_LPCR + bl __init_LPCR_ISA206 bl __init_tlb_power7 mtlr r11 blr @@ -59,7 +59,7 @@ _GLOBAL(__setup_cpu_power8) mtspr SPRN_LPID,r0 mfspr r3,SPRN_LPCR ori r3, r3, LPCR_PECEDH - bl __init_LPCR + bl __init_LPCR_ISA206 bl __init_HFSCR bl __init_tlb_power8 bl __init_PMU_HV @@ -80,7 +80,7 @@ _GLOBAL(__restore_cpu_power8) mtspr SPRN_LPID,r0 mfspr r3,SPRN_LPCR ori r3, r3, LPCR_PECEDH - bl __init_LPCR + bl __init_LPCR_ISA206 bl __init_HFSCR bl __init_tlb_power8 bl __init_PMU_HV @@ -103,7 +103,7 @@ _GLOBAL(__setup_cpu_power9) or r3, r3, r4 LOAD_REG_IMMEDIATE(r4, LPCR_UPRT | LPCR_HR) andc r3, r3, r4 - bl __init_LPCR + bl __init_LPCR_ISA300 bl __init_HFSCR bl __init_tlb_power9 bl __init_PMU_HV @@ -126,7 +126,7 @@ _GLOBAL(__restore_cpu_power9) or r3, r3, r4 LOAD_REG_IMMEDIATE(r4, LPCR_UPRT | LPCR_HR) andc r3, r3, r4 - bl __init_LPCR + bl __init_LPCR_ISA300 bl __init_HFSCR bl __init_tlb_power9 bl __init_PMU_HV @@ -144,7 +144,7 @@ __init_hvmode_206: std r5,CPU_SPEC_FEATURES(r4) blr -__init_LPCR: +__init_LPCR_ISA206: /* Setup a sane LPCR: * Called with initial LPCR in R3 * @@ -157,6 +157,11 @@ __init_LPCR: * * Other bits untouched for now */ + li r5,0x10 + rldimi r3,r5, LPCR_VRMASD_SH, 64-LPCR_VRMASD_SH-5 + + /* POWER9 has no VRMASD */ +__init_LPCR_ISA300: li r5,1 rldimi r3,r5, LPCR_LPES_SH, 64-LPCR_LPES_SH-2 ori r3,r3,(LPCR_PECE0|LPCR_PECE1|LPCR_PECE2) @@ -165,8 +170,6 @@ __init_LPCR: clrrdi r3,r3,1 /* clear HDICE */ li r5,4 rldimi r3,r5, LPCR_VC_SH, 0 - li r5,0x10 - rldimi r3,r5, LPCR_VRMASD_SH, 64-LPCR_VRMASD_SH-5 mtspr SPRN_LPCR,r3 isync blr