From patchwork Tue Apr 11 08:18:30 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Zijlstra X-Patchwork-Id: 749377 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3w2Kjc476wz9sNH for ; Tue, 11 Apr 2017 18:20:04 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=infradead.org header.i=@infradead.org header.b="ifaGclEM"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3w2Kjc35BvzDq9L for ; Tue, 11 Apr 2017 18:20:04 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=infradead.org header.i=@infradead.org header.b="ifaGclEM"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [65.50.211.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3w2Kgx4pYfzDq5x for ; Tue, 11 Apr 2017 18:18:37 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=infradead.org header.i=@infradead.org header.b="ifaGclEM"; dkim-atps=neutral DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=bombadil.20170209; h=In-Reply-To:Content-Type:MIME-Version :References:Message-ID:Subject:Cc:To:From:Date:Sender:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Id: List-Help:List-Unsubscribe:List-Subscribe:List-Post:List-Owner:List-Archive; bh=HwT7BS2LFrpcTxo5+AJI5Jk+4+Kw4DWqZ0JDTbD5v+8=; b=ifaGclEMRjIlmlWTyyWws4ytq Ko4rSWrvqB+Igb8AMTeDJKHOmSXhJ2i2Erj3wqpGluVOMKb7s5WujNYw0v7sZoTwFRxPy4C800rOF IUiW/r5hySSF1owfzE+TkJo72ySBzM0f0Xgh/Iw/kNImjYZYoLdBnZU6LEpnAGR3KhEIjKLr2Csek cW1i9R96+3BbyMziYCn5S3tOtKkBb/mL+llSQsca/ap0ewMxWqZP8NYf0iGSK1Ya5psbOCOG2W+t3 LPfE4QLf8D9nm4fl+Co3Dbw51gJ0PqBp/Yd+h6xUm9+oGNaIkb/fWFjM0Kk8tgzZrmQltSBO1IH0E zpOQ/IGeA==; Received: from j217100.upc-j.chello.nl ([24.132.217.100] helo=hirez.programming.kicks-ass.net) by bombadil.infradead.org with esmtpsa (Exim 4.87 #1 (Red Hat Linux)) id 1cxr0S-0003JN-PG; Tue, 11 Apr 2017 08:18:32 +0000 Received: by hirez.programming.kicks-ass.net (Postfix, from userid 1000) id E684820598378; Tue, 11 Apr 2017 10:18:30 +0200 (CEST) Date: Tue, 11 Apr 2017 10:18:30 +0200 From: Peter Zijlstra To: Jin Yao Subject: Re: [PATCH v3 2/5] perf/x86/intel: Record branch type Message-ID: <20170411081830.57372og2mzkhiftr@hirez.programming.kicks-ass.net> References: <1491908193-25418-1-git-send-email-yao.jin@linux.intel.com> <1491908193-25418-3-git-send-email-yao.jin@linux.intel.com> <20170411075219.bcteozodfkmwo45f@hirez.programming.kicks-ass.net> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20170411075219.bcteozodfkmwo45f@hirez.programming.kicks-ass.net> User-Agent: NeoMutt/20170113 (1.7.2) X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: ak@linux.intel.com, alexander.shishkin@linux.intel.com, kan.liang@intel.com, linuxppc-dev@lists.ozlabs.org, Linux-kernel@vger.kernel.org, acme@kernel.org, mingo@redhat.com, jolsa@kernel.org, Thomas Gleixner , yao.jin@intel.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Tue, Apr 11, 2017 at 09:52:19AM +0200, Peter Zijlstra wrote: > On Tue, Apr 11, 2017 at 06:56:30PM +0800, Jin Yao wrote: > > @@ -960,6 +1006,11 @@ intel_pmu_lbr_filter(struct cpu_hw_events *cpuc) > > cpuc->lbr_entries[i].from = 0; > > compress = true; > > } > > + > > + if ((br_sel & X86_BR_TYPE_SAVE) == X86_BR_TYPE_SAVE) > > + cpuc->lbr_entries[i].type = common_branch_type(type); > > + else > > + cpuc->lbr_entries[i].type = PERF_BR_NONE; > > } I was wondering WTH you did that else; because it should already be 0 (aka, BR_NONE). Then I found intel_pmu_lbr_read_32() is already broken, and you just broke intel_pmu_lbr_read_64(). Arguably we should add a union on the last __u64 with a name for the entire thing, but the below is the minimal fix. --- Subject: perf,x86: Avoid exposing wrong/stale data in intel_pmu_lbr_read_32() From: Peter Zijlstra Date: Tue Apr 11 10:10:28 CEST 2017 When the perf_branch_entry::{in_tx,abort,cycles} fields were added, intel_pmu_lbr_read_32() wasn't updated to initialize them. Fixes: 135c5612c460 ("perf/x86/intel: Support Haswell/v4 LBR format") Signed-off-by: Peter Zijlstra (Intel) --- --- a/arch/x86/events/intel/lbr.c +++ b/arch/x86/events/intel/lbr.c @@ -507,6 +507,9 @@ static void intel_pmu_lbr_read_32(struct cpuc->lbr_entries[i].to = msr_lastbranch.to; cpuc->lbr_entries[i].mispred = 0; cpuc->lbr_entries[i].predicted = 0; + cpuc->lbr_entries[i].in_tx = 0; + cpuc->lbr_entries[i].abort = 0; + cpuc->lbr_entries[i].cycles = 0; cpuc->lbr_entries[i].reserved = 0; } cpuc->lbr_stack.nr = i;