From patchwork Tue Mar 14 09:23:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 738594 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vj8Yh0DSzz9s0g for ; Tue, 14 Mar 2017 20:28:40 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="qP2kIvu3"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3vj8Yg6M6gzDqZJ for ; Tue, 14 Mar 2017 20:28:39 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="qP2kIvu3"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from mail-pg0-x243.google.com (mail-pg0-x243.google.com [IPv6:2607:f8b0:400e:c05::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3vj8SX3MnFzDqXy for ; Tue, 14 Mar 2017 20:24:12 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="qP2kIvu3"; dkim-atps=neutral Received: by mail-pg0-x243.google.com with SMTP id 25so23251772pgy.3 for ; Tue, 14 Mar 2017 02:24:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=QUMBP4M4YxZ/s73LFXfmhowAkvuT/KSNS+xARLamBJs=; b=qP2kIvu3UX1erBk7QEtj3+VwlkHTigfdWqiaRshQsLQEs98QFfz0r04egsmOY4ew+V nlax+Da5WUDEyebmAmWxbwqV86aLe8OniXgVPoGLsg1AOfXSRnKWxtYPtU3Dhgdd4Ogt foAUQ49Ufd/Zfk9E+XSYh/0qXz72lhk+fBlfRf/x3BzWVI1TI+AC8rl3+17Jae+odFXb si3C0TwcXw/PpeDjg6YucH1baCz8PtCDzezluDgfAS8NODQXREQQuLv7E1R8DQ1QxVAI 6RC/pmmi7I8Ve6mnN5Vyu3Jo9XWQwLLQc3e/q4AL9syW/QnYrNRVd+nXZkzZiKa45pst +pIg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=QUMBP4M4YxZ/s73LFXfmhowAkvuT/KSNS+xARLamBJs=; b=RvaUGvktslCpmON57M6Iq5dk73EA57nAqXze3foQEDq8Beeo18CoM4SVYjdPbMznLe 4TDxLSzKbfMrIunjObkHvUFNzoSFE6GfCAeGBYiw+6YcEGxhs9Rh1hbdqnBu8p6iQYx3 e0wnNGbnfwO0t4Hhb7RcWrXDPdiOo9IusMX5Nw1H0x60axJkbRhMR+nUgbCH9k6v8GJ5 FPnoEBbID/tSbZVw6T0lhip2ypkOTY5IgPuAB8+yI3b987IT72KHsRnT8ynRa+wsOSRl Y9saYgINBlp29QOYsxPuOpJ119kR1ykWuPpK5fbmTAOg/ffkUYtDZGDsQEgp8tkekTPB fgkQ== X-Gm-Message-State: AMke39n9CA8C3gEo+vjw56oBIDIscOTpI9uKjEB63pSPIKWYSo/GMNh2qdxJuShePy1URg== X-Received: by 10.99.117.85 with SMTP id f21mr41782062pgn.62.1489483450462; Tue, 14 Mar 2017 02:24:10 -0700 (PDT) Received: from roar.au.ibm.com ([203.221.48.234]) by smtp.gmail.com with ESMTPSA id s21sm37262882pfs.87.2017.03.14.02.24.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 14 Mar 2017 02:24:09 -0700 (PDT) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH 2/8] powerpc/64s: stop using bit in HSPRG0 to test winkle Date: Tue, 14 Mar 2017 19:23:43 +1000 Message-Id: <20170314092349.10981-3-npiggin@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170314092349.10981-1-npiggin@gmail.com> References: <20170314092349.10981-1-npiggin@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gautham R Shenoy , Nicholas Piggin Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The POWER8 idle code has a neat trick of programming the power on engine to restore a low bit into HSPRG0, so idle wakeup code can test and see if it has been programmed this way and therefore lost all state, and avoiding the expensive full restore if not. However this messes with our r13 PACA pointer, and requires HSPRG0 to be written to throughout the exception handlers and idle wakeup, rather than just once on kernel entry. Remove this complexity and assume winkle sleeps always require a state restore. This speedup is later re-introduced by counting per-core winkles and setting a bitmap of threads with state loss when all are in winkle. Signed-off-by: Nicholas Piggin Reviewed-by: Gautham R. Shenoy --- arch/powerpc/include/asm/exception-64s.h | 13 ++----------- arch/powerpc/kernel/exceptions-64s.S | 21 +++------------------ arch/powerpc/kernel/idle_book3s.S | 23 ++++++++--------------- arch/powerpc/platforms/powernv/idle.c | 13 ------------- 4 files changed, 13 insertions(+), 57 deletions(-) diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h index 14752eee3d0c..f5fe7c901b37 100644 --- a/arch/powerpc/include/asm/exception-64s.h +++ b/arch/powerpc/include/asm/exception-64s.h @@ -167,17 +167,14 @@ BEGIN_FTR_SECTION_NESTED(943) \ std ra,offset(r13); \ END_FTR_SECTION_NESTED(ftr,ftr,943) -#define EXCEPTION_PROLOG_0_PACA(area) \ +#define EXCEPTION_PROLOG_0(area) \ + GET_PACA(r13); \ std r9,area+EX_R9(r13); /* save r9 */ \ OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \ HMT_MEDIUM; \ std r10,area+EX_R10(r13); /* save r10 - r12 */ \ OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR) -#define EXCEPTION_PROLOG_0(area) \ - GET_PACA(r13); \ - EXCEPTION_PROLOG_0_PACA(area) - #define __EXCEPTION_PROLOG_1(area, extra, vec) \ OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \ OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \ @@ -208,12 +205,6 @@ END_FTR_SECTION_NESTED(ftr,ftr,943) EXCEPTION_PROLOG_1(area, extra, vec); \ EXCEPTION_PROLOG_PSERIES_1(label, h); -/* Have the PACA in r13 already */ -#define EXCEPTION_PROLOG_PSERIES_PACA(area, label, h, extra, vec) \ - EXCEPTION_PROLOG_0_PACA(area); \ - EXCEPTION_PROLOG_1(area, extra, vec); \ - EXCEPTION_PROLOG_PSERIES_1(label, h); - #define __KVMTEST(h, n) \ lbz r10,HSTATE_IN_GUEST(r13); \ cmpwi r10,0; \ diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index 2f837a4a78a2..e390fcd04bcb 100644 --- a/arch/powerpc/kernel/exceptions-64s.S +++ b/arch/powerpc/kernel/exceptions-64s.S @@ -116,9 +116,7 @@ EXC_VIRT_NONE(0x4000, 0x100) EXC_REAL_BEGIN(system_reset, 0x100, 0x100) SET_SCRATCH0(r13) - GET_PACA(r13) - clrrdi r13,r13,1 /* Last bit of HSPRG0 is set if waking from winkle */ - EXCEPTION_PROLOG_PSERIES_PACA(PACA_EXGEN, system_reset_common, EXC_STD, + EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD, IDLETEST, 0x100) EXC_REAL_END(system_reset, 0x100, 0x100) @@ -148,14 +146,6 @@ EXC_REAL_BEGIN(machine_check, 0x200, 0x100) * vector */ SET_SCRATCH0(r13) /* save r13 */ - /* - * Running native on arch 2.06 or later, we may wakeup from winkle - * inside machine check. If yes, then last bit of HSPRG0 would be set - * to 1. Hence clear it unconditionally. - */ - GET_PACA(r13) - clrrdi r13,r13,1 - SET_PACA(r13) EXCEPTION_PROLOG_0(PACA_EXMC) BEGIN_FTR_SECTION b machine_check_powernv_early @@ -339,7 +329,7 @@ EXC_COMMON_BEGIN(machine_check_handle_early) * Go back to nap/sleep/winkle mode again if (b) is true. */ rlwinm. r11,r12,47-31,30,31 /* Was it in power saving mode? */ - beq 4f /* No, it wasn;t */ + beq 4f /* No, it wasn't */ /* Thread was in power saving mode. Go back to nap again. */ cmpwi r11,2 blt 3f @@ -369,13 +359,8 @@ EXC_COMMON_BEGIN(machine_check_handle_early) /* * Go back to winkle. Please note that this thread was woken up in * machine check from winkle and have not restored the per-subcore - * state. Hence before going back to winkle, set last bit of HSPRG0 - * to 1. This will make sure that if this thread gets woken up - * again at reset vector 0x100 then it will get chance to restore - * the subcore state. + * state. */ - ori r13,r13,1 - SET_PACA(r13) IDLE_STATE_ENTER_SEQ_NORET(PPC_WINKLE) /* No return */ 4: diff --git a/arch/powerpc/kernel/idle_book3s.S b/arch/powerpc/kernel/idle_book3s.S index 4313c107da5d..405631b2c229 100644 --- a/arch/powerpc/kernel/idle_book3s.S +++ b/arch/powerpc/kernel/idle_book3s.S @@ -377,11 +377,12 @@ _GLOBAL(power9_idle_stop) b pnv_powersave_common /* No return */ +/* + * Called from reset vector for powersave wakeups. + * cr3 - set to gt if waking up with partial/complete hypervisor state loss + */ .global pnv_powersave_wakeup pnv_powersave_wakeup: -BEGIN_FTR_SECTION - GET_PACA(r13) /* Restore HSPRG0 to get the winkle bit in r13 */ -END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300) bl pnv_restore_hyp_resource li r0,PNV_THREAD_RUNNING @@ -408,12 +409,12 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_300) * Check whether we have woken up with hypervisor state loss. * If yes, restore hypervisor state and return back to link. * - * r13 - Contents of HSPRG0 * cr3 - set to gt if waking up with partial/complete hypervisor state loss */ pnv_restore_hyp_resource: -BEGIN_FTR_SECTION ld r2,PACATOC(r13); + +BEGIN_FTR_SECTION /* * POWER ISA 3. Use PSSCR to determine if we * are waking up from deep idle state @@ -436,19 +437,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_300) /* * POWER ISA 2.07 or less. - * Check if last bit of HSPGR0 is set. This indicates whether we are - * waking up from winkle. + * Check if we slept with winkle. */ - clrldi r5,r13,63 - clrrdi r13,r13,1 - - /* Now that we are sure r13 is corrected, load TOC */ - ld r2,PACATOC(r13); - cmpwi cr4,r5,1 - mtspr SPRN_HSPRG0,r13 - lbz r0,PACA_THREAD_IDLE_STATE(r13) cmpwi cr2,r0,PNV_THREAD_NAP + cmpwi cr4,r0,PNV_THREAD_WINKLE bgt cr2,pnv_wakeup_tb_loss /* Either sleep or Winkle */ /* diff --git a/arch/powerpc/platforms/powernv/idle.c b/arch/powerpc/platforms/powernv/idle.c index 4ee837e6391a..f9fe0ff0f03a 100644 --- a/arch/powerpc/platforms/powernv/idle.c +++ b/arch/powerpc/platforms/powernv/idle.c @@ -53,19 +53,6 @@ static int pnv_save_sprs_for_deep_states(void) uint64_t pir = get_hard_smp_processor_id(cpu); uint64_t hsprg0_val = (uint64_t)&paca[cpu]; - if (!cpu_has_feature(CPU_FTR_ARCH_300)) { - /* - * HSPRG0 is used to store the cpu's pointer to paca. - * Hence last 3 bits are guaranteed to be 0. Program - * slw to restore HSPRG0 with 63rd bit set, so that - * when a thread wakes up at 0x100 we can use this bit - * to distinguish between fastsleep and deep winkle. - * This is not necessary with stop/psscr since PLS - * field of psscr indicates which state we are waking - * up from. - */ - hsprg0_val |= 1; - } rc = opal_slw_set_reg(pir, SPRN_HSPRG0, hsprg0_val); if (rc != 0) return rc;