From patchwork Tue Feb 28 02:00:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 733260 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vXMNs2f93z9s8W for ; Tue, 28 Feb 2017 13:05:33 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="p6B0cxjH"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3vXMNs1Y0zzDqHG for ; Tue, 28 Feb 2017 13:05:33 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="p6B0cxjH"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from mail-pg0-x243.google.com (mail-pg0-x243.google.com [IPv6:2607:f8b0:400e:c05::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3vXMHq5qRrzDqGl for ; Tue, 28 Feb 2017 13:01:11 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="p6B0cxjH"; dkim-atps=neutral Received: by mail-pg0-x243.google.com with SMTP id x17so2879151pgi.0 for ; Mon, 27 Feb 2017 18:01:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=d7BmeAc8RppoRgHdJoPpuf9dMAKVWoyuimVOM+mBzt4=; b=p6B0cxjHws+ygeDnXn75yarYAqEZKFRH37gLAwHhn+6s3Ymckbp6C/mAApHRevDixw yZ8tDDMa6yngimBsfYPRXvMHv9sRoxGxZK1L6iI7qkpWre9XZ+DhasE7tLZlzbDbUwWx /z2YYtAxjbmHhlGrnK8k5TK9rACIwO/P0Vd+O/tLPwz4RO8bCFBHXaLR2NIT2CYNsJSE Gqy5t70zdx0lz7svKF4VQ4SWeMcI4q7E7IiOx5fbLiasH8mW59rTeUsD1E/XRrz/QtpN MTQWvaKcL7r4qh7qHoJbpqipjZ2wotAjAqng2LwV4NH5Lc4Q2Lw9Lc1SlbjfY+3eWwYL 9Fdw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=d7BmeAc8RppoRgHdJoPpuf9dMAKVWoyuimVOM+mBzt4=; b=bVlMUWEh+8CbMqwQ2YOj77UoFDArhCIRdcNBTWHaX/QtMmVZgOSwNFlXvp+0KB81v0 wh3wicssMllXxzJ4fswz7fN9rTf8mhV/tgkjsOtdirIC76z8JN/6etCjYD8+cx59MQXN jpXyCG21tvYX691qkxodkS0Db076W1NYlOSGNPV3Q8eu+BciSK1nM/59zvngif3a2RMz TI4YJRPnyoXHkEhjrLe5HrzS/Tbgfu9oxR7MuKR5MToZlmSmY7SN5XX0llb4aVULNM5/ UdbvWjzdU/FjsFJBuCYFG38AHbc0ZoZNJrhHCqWvAFX0M3UM62+xRpzV5QmaTOStNPxK dXJw== X-Gm-Message-State: AMke39lAgiZRHb9hdNZOgRfPq9dwuThzOfyZS34qRSk/id44fYML9/lpzi7MxkayjDAGFQ== X-Received: by 10.84.139.36 with SMTP id 33mr28382965plq.61.1488247270259; Mon, 27 Feb 2017 18:01:10 -0800 (PST) Received: from roar.au.ibm.com ([203.221.48.234]) by smtp.gmail.com with ESMTPSA id z189sm231186pgb.3.2017.02.27.18.01.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Feb 2017 18:01:09 -0800 (PST) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH 2/3] powerpc/64s: allow machine check handler to set severity and initiator Date: Tue, 28 Feb 2017 12:00:47 +1000 Message-Id: <20170228020048.8862-3-npiggin@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170228020048.8862-1-npiggin@gmail.com> References: <20170228020048.8862-1-npiggin@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nicholas Piggin , Mahesh Salgaonkar Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Currently severity and initiator are always set to MCE_SEV_ERROR_SYNC and MCE_INITIATOR_CPU in the core mce code. Allow them to be set by the machine specific mce handlers. No functional change for existing handlers. Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/mce.h | 3 ++- arch/powerpc/kernel/mce.c | 5 +++-- arch/powerpc/kernel/mce_power.c | 6 ++++++ 3 files changed, 11 insertions(+), 3 deletions(-) diff --git a/arch/powerpc/include/asm/mce.h b/arch/powerpc/include/asm/mce.h index f97d8cb6bdf6..b2a5865ccd87 100644 --- a/arch/powerpc/include/asm/mce.h +++ b/arch/powerpc/include/asm/mce.h @@ -177,7 +177,8 @@ struct mce_error_info { enum MCE_EratErrorType erat_error_type:8; enum MCE_TlbErrorType tlb_error_type:8; } u; - uint8_t reserved[2]; + enum MCE_Severity severity:8; + enum MCE_Initiator initiator:8; }; #define MAX_MC_EVT 100 diff --git a/arch/powerpc/kernel/mce.c b/arch/powerpc/kernel/mce.c index c6923ff45131..949507277436 100644 --- a/arch/powerpc/kernel/mce.c +++ b/arch/powerpc/kernel/mce.c @@ -90,13 +90,14 @@ void save_mce_event(struct pt_regs *regs, long handled, mce->gpr3 = regs->gpr[3]; mce->in_use = 1; - mce->initiator = MCE_INITIATOR_CPU; /* Mark it recovered if we have handled it and MSR(RI=1). */ if (handled && (regs->msr & MSR_RI)) mce->disposition = MCE_DISPOSITION_RECOVERED; else mce->disposition = MCE_DISPOSITION_NOT_RECOVERED; - mce->severity = MCE_SEV_ERROR_SYNC; + + mce->initiator = mce_err->initiator; + mce->severity = mce_err->severity; /* * Populate the mce error_type and type-specific error_type. diff --git a/arch/powerpc/kernel/mce_power.c b/arch/powerpc/kernel/mce_power.c index 7353991c4ece..c37fc5fdd433 100644 --- a/arch/powerpc/kernel/mce_power.c +++ b/arch/powerpc/kernel/mce_power.c @@ -281,6 +281,9 @@ long __machine_check_early_realmode_p7(struct pt_regs *regs) long handled = 1; struct mce_error_info mce_error_info = { 0 }; + mce_error_info.severity = MCE_SEV_ERROR_SYNC; + mce_error_info.initiator = MCE_INITIATOR_CPU; + srr1 = regs->msr; nip = regs->nip; @@ -352,6 +355,9 @@ long __machine_check_early_realmode_p8(struct pt_regs *regs) long handled = 1; struct mce_error_info mce_error_info = { 0 }; + mce_error_info.severity = MCE_SEV_ERROR_SYNC; + mce_error_info.initiator = MCE_INITIATOR_CPU; + srr1 = regs->msr; nip = regs->nip;