From patchwork Wed Feb 1 23:16:24 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 722703 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vDK4269SDz9s9Y for ; Thu, 2 Feb 2017 10:25:22 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="VbuONDyJ"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3vDK4258XpzDqFn for ; Thu, 2 Feb 2017 10:25:22 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="VbuONDyJ"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org X-Greylist: delayed 366 seconds by postgrey-1.36 at bilbo; Thu, 02 Feb 2017 10:24:00 AEDT Authentication-Results: lists.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="VbuONDyJ"; dkim-atps=neutral Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3vDK2S0ryMzDq8b for ; Thu, 2 Feb 2017 10:23:59 +1100 (AEDT) Received: from mmarshal3.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id 07432800E6; Thu, 2 Feb 2017 12:17:51 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail; t=1485991071; bh=5Q2lp14oQZgnYWP5+xOw8VzMwZ/6vodV3WNtEIC6tBE=; h=From:To:Cc:Subject:Date; b=VbuONDyJwC1TMTcxog77AEZ3Ax/Ned8k1if3Jv1LHT0PDx8ljjpkwu8b7gt+LyWgR yTUusw9VKx/sqMEiRU85QL0Kr2/DeNfliuNRd8qR2KbZR1iqJQ3hFr0rd9qiu7u+lz X5oV0MkKiurF8VN4Xu0GwxZR3qTa3UviGz5ienKk= Received: from smtp (Not Verified[10.32.16.33]) by mmarshal3.atlnz.lc with Trustwave SEG (v7, 5, 6, 8438) id ; Thu, 02 Feb 2017 12:17:50 +1300 Received: from chrisp-dl.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by smtp (Postfix) with ESMTP id A79F813ED45; Thu, 2 Feb 2017 12:17:49 +1300 (NZDT) Received: by chrisp-dl.atlnz.lc (Postfix, from userid 1030) id DD9EB1E1D9B; Thu, 2 Feb 2017 12:17:49 +1300 (NZDT) From: Chris Packham To: linux-edac@vger.kernel.org, morbidrsa@gmail.com Subject: [PATCH v2] EDAC: mpc85xx: Add T2080 l2-cache support Date: Thu, 2 Feb 2017 12:16:24 +1300 Message-Id: <20170201231624.28843-1-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.11.0.24.ge6920cf X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Chris Packham , Paul Mackerras , Borislav Petkov , Mauro Carvalho Chehab , linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The l2-cache controller on the T2080 SoC has similar capabilities to the others already supported by the mpc85xx_edac driver. Add it to the list of compatible devices. Signed-off-by: Chris Packham Acked-by: Johannes Thumshirn Acked-by: Michael Ellerman --- This is a resend of a patch that got an ack[1] but didn't seem to get picked up. [1] http://marc.info/?l=linux-edac&m=148042072225488&w=2 Changes since v1: - Collect ack from Johannes. arch/powerpc/boot/dts/fsl/t2081si-post.dtsi | 1 + drivers/edac/mpc85xx_edac.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi index c744569a20e1..a97296c64eb2 100644 --- a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi @@ -678,5 +678,6 @@ compatible = "fsl,t2080-l2-cache-controller"; reg = <0xc20000 0x40000>; next-level-cache = <&cpc>; + interrupts = <16 2 1 9>; }; }; diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index 8f66cbed70b7..67f7bc3fe5b3 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c @@ -629,6 +629,7 @@ static const struct of_device_id mpc85xx_l2_err_of_match[] = { { .compatible = "fsl,p1020-l2-cache-controller", }, { .compatible = "fsl,p1021-l2-cache-controller", }, { .compatible = "fsl,p2020-l2-cache-controller", }, + { .compatible = "fsl,t2080-l2-cache-controller", }, {}, }; MODULE_DEVICE_TABLE(of, mpc85xx_l2_err_of_match);