From patchwork Mon Dec 19 18:30:11 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 707190 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tj91j3Nj2z9vFc for ; Tue, 20 Dec 2016 05:49:13 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="J/uTkXIg"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3tj91j2CtXzDy1P for ; Tue, 20 Dec 2016 05:49:13 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="J/uTkXIg"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from mail-pg0-x243.google.com (mail-pg0-x243.google.com [IPv6:2607:f8b0:400e:c05::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3tj8cT5TPvzDwPx for ; Tue, 20 Dec 2016 05:30:49 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="J/uTkXIg"; dkim-atps=neutral Received: by mail-pg0-x243.google.com with SMTP id w68so3191609pgw.3 for ; Mon, 19 Dec 2016 10:30:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=oht9U+MlyJHPRQ/uvtv40679dRATqiovIdKT/wa+9t0=; b=J/uTkXIg88tEg+sZrawuYEP1axoXA+NFArWtjRcaOkN9Ij1gniIiCup848+Y0/E6dG QxJA1wBb9tTU6AxXD5DgR6VRWSHteUU4wgh/MDXdTsP56ftU9Af8V5Q2kJu7p+PlT5qJ mkZEmCIbDNuZZaXqM7iXyilQedb3b1+A1TdpDbrqf9ieJodRUs6Xx/ElShmq9NWrgAdE 1I0K3JR8RLCeqXlWzAH5ydmWDtmaGPRlzStNa0HqPB0Z4yFICubWly13nTjeH0OZd542 Jyi22kUwovkhJh7+82+MGOmLbSEbSnE2b2frGiLUDz1Tx11oniulqsXH+/QZbHMlSYhj kXrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=oht9U+MlyJHPRQ/uvtv40679dRATqiovIdKT/wa+9t0=; b=f8lVBFVw0FY2ufys4OG0nKGIsmtOeIOswBTZMd3FbtH0697wBSnkGhzOa6PJ2yGz1d KEmEGJnbVwUtP9JRm2/eQDNmfL7h/AyTgSB7K3sb1guJlgvf74reHuEaqoAp/TWketVb /umEACP6uwny8NPwnbTBgGDFPD8XopXQFbqzMp4IjuEAQ9wgtChqIbdHQup2tKfQEECI RO/9ubgGF4VBrRbM7jWZ6lhqTT8dLefHW8dD8vn4i09sgPY4gaAgaadn0MLTtGNjO86B Nk/bvuCjPvDbOqJU0fZdfHsk3yZ3qkx/QD3rktqC6cY7c/5ENXroUWS3aWrc26D87cCF XY/A== X-Gm-Message-State: AIkVDXLCRjv1SIOfvAXW80kgRvT6UCKx5t+gpYtdkYL9G1iY55nfhoiXp6bNKIn5RTo0PA== X-Received: by 10.99.155.10 with SMTP id r10mr21024583pgd.28.1482172248015; Mon, 19 Dec 2016 10:30:48 -0800 (PST) Received: from roar.au.ibm.com ([61.68.124.232]) by smtp.gmail.com with ESMTPSA id g27sm33135147pfk.58.2016.12.19.10.30.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 19 Dec 2016 10:30:47 -0800 (PST) From: Nicholas Piggin To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH 10/10] powerpc: xmon wait for secondaries before sending IPI Date: Tue, 20 Dec 2016 04:30:11 +1000 Message-Id: <20161219183011.28310-11-npiggin@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20161219183011.28310-1-npiggin@gmail.com> References: <20161219183011.28310-1-npiggin@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nicholas Piggin Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" An externally triggered system reset (e.g., via QEMU nmi command, or pseries reset button) can cause system reset interrupts on all CPUs. In case this causes xmon to be entered, it is undesirable for the primary (first) CPU into xmon to trigger an NMI IPI to others, because this may cause a nested system reset interrupt. So spin for a time waiting for secondaries to join xmon before performing the NMI IPI, similarly to what the crash dump code does. Signed-off-by: Nicholas Piggin --- arch/powerpc/xmon/xmon.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index 77a88319f494..9f88ec4af0b3 100644 --- a/arch/powerpc/xmon/xmon.c +++ b/arch/powerpc/xmon/xmon.c @@ -516,14 +516,25 @@ static int xmon_core(struct pt_regs *regs, int fromipi) xmon_owner = cpu; mb(); if (ncpus > 1) { + /* + * system resets can be triggered on all CPUs, so + * wait for others to come in and avoid the IPI. This + * is similar to crash_kexec_secondary() + */ + for (timeout = 100000000; timeout != 0; --timeout) { + if (cpumask_weight(&cpus_in_xmon) >= ncpus) + goto got_cpus; + barrier(); + } smp_send_debugger_break(); /* wait for other cpus to come in */ for (timeout = 100000000; timeout != 0; --timeout) { if (cpumask_weight(&cpus_in_xmon) >= ncpus) - break; + goto got_cpus; barrier(); } } +got_cpus: remove_bpts(); disable_surveillance(); /* for breakpoint or single step, print the current instr. */