From patchwork Tue Nov 29 02:20:37 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 700281 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tSTHc1ngKz9vDt for ; Tue, 29 Nov 2016 14:17:16 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="iOyG+tnK"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3tSTHc0jSczDw86 for ; Tue, 29 Nov 2016 14:17:16 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="iOyG+tnK"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org X-Greylist: delayed 521 seconds by postgrey-1.36 at bilbo; Tue, 29 Nov 2016 14:09:13 AEDT Authentication-Results: lists.ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=alliedtelesis.co.nz header.i=@alliedtelesis.co.nz header.b="iOyG+tnK"; dkim-atps=neutral Received: from gate2.alliedtelesis.co.nz (gate2.alliedtelesis.co.nz [202.36.163.20]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3tST6K3cYQzDw1d for ; Tue, 29 Nov 2016 14:09:13 +1100 (AEDT) Received: from mmarshal3.atlnz.lc (mmarshal3.atlnz.lc [10.32.18.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by gate2.alliedtelesis.co.nz (Postfix) with ESMTPS id C236487851; Tue, 29 Nov 2016 16:00:30 +1300 (NZDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=alliedtelesis.co.nz; s=mail; t=1480388430; bh=osMwZiA6ul0mBtxGHhLVZFnG9vn94eRovfxmEPiHd6I=; h=From:To:Cc:Subject:Date; b=iOyG+tnKdwFz+VsF6nBIMYL4md/VDQiNOOcJSJSm70QT7OSrenXf/c0Ak/TZZJ48Z IR5gK1UjbWnG68tfL5W18q1WgCK9kl/A+MSCsOC5ihpLKX8uDcQewjWgkDHq29wHOp oLeCwhfQcCaVHm6BG0xJgNgLmrORFqBwa9roKDd0= Received: from smtp (Not Verified[10.32.16.33]) by mmarshal3.atlnz.lc with Trustwave SEG (v7, 5, 6, 8438) id ; Tue, 29 Nov 2016 15:21:00 +1300 Received: from chrisp-dl.atlnz.lc (chrisp-dl.ws.atlnz.lc [10.33.22.30]) by smtp (Postfix) with ESMTP id E004B13EF06; Tue, 29 Nov 2016 15:20:54 +1300 (NZDT) Received: by chrisp-dl.atlnz.lc (Postfix, from userid 1030) id 41EAA1E04EC; Tue, 29 Nov 2016 15:20:55 +1300 (NZDT) From: Chris Packham To: linux-edac@vger.kernel.org Subject: [PATCH] EDAC: mpc85xx: Add T2080 l2-cache support Date: Tue, 29 Nov 2016 15:20:37 +1300 Message-Id: <20161129022038.24737-1-chris.packham@alliedtelesis.co.nz> X-Mailer: git-send-email 2.10.2 X-Mailman-Approved-At: Tue, 29 Nov 2016 14:15:56 +1100 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , devicetree@vger.kernel.org, Johannes Thumshirn , linux-kernel@vger.kernel.org, Rob Herring , Chris Packham , Paul Mackerras , Borislav Petkov , Mauro Carvalho Chehab , linuxppc-dev@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The l2-cache controller on the T2080 SoC has similar capabilities to the others already supported by the mpc85xx_edac driver. Add it to the list of compatible devices. Signed-off-by: Chris Packham Acked-by: Johannes Thumshirn --- arch/powerpc/boot/dts/fsl/t2081si-post.dtsi | 1 + drivers/edac/mpc85xx_edac.c | 1 + 2 files changed, 2 insertions(+) diff --git a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi index c744569a20e1..a97296c64eb2 100644 --- a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi +++ b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi @@ -678,5 +678,6 @@ compatible = "fsl,t2080-l2-cache-controller"; reg = <0xc20000 0x40000>; next-level-cache = <&cpc>; + interrupts = <16 2 1 9>; }; }; diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index ff0567526ee3..aee6dcdae02a 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c @@ -613,6 +613,7 @@ static const struct of_device_id mpc85xx_l2_err_of_match[] = { { .compatible = "fsl,p1020-l2-cache-controller", }, { .compatible = "fsl,p1021-l2-cache-controller", }, { .compatible = "fsl,p2020-l2-cache-controller", }, + { .compatible = "fsl,t2080-l2-cache-controller", }, {}, }; MODULE_DEVICE_TABLE(of, mpc85xx_l2_err_of_match);