From patchwork Thu Sep 15 09:04:46 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 670281 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3sZXbg68Rnz9s1h for ; Thu, 15 Sep 2016 19:06:55 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=sLXtdCMk; dkim-atps=neutral Received: from ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3sZXbg500pzDsYY for ; Thu, 15 Sep 2016 19:06:55 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=sLXtdCMk; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from mail-pa0-x243.google.com (mail-pa0-x243.google.com [IPv6:2607:f8b0:400e:c03::243]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3sZXYR2yc4zDsYX for ; Thu, 15 Sep 2016 19:04:59 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=sLXtdCMk; dkim-atps=neutral Received: by mail-pa0-x243.google.com with SMTP id vz6so1896755pab.1 for ; Thu, 15 Sep 2016 02:04:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id; bh=4tbUqpNoeGZsdiZGUxJuKmD9bm8bPn756ai7jm7qcXY=; b=sLXtdCMk9M5REML5Dv04H8fn0Fxm8dlKOBbhXRvCAT1XT0fPVy8KRMdJgOsOAeLToe w2WnzHDFNdq4AxtvWYtWEW04Qt5Ka7+GKvdg5ym8gN00nfDWVLRKd+DKOgr7s15S/hRp GVVZYRvJYBD7to+Wiuw78l6Vc93OhAQD2AlKqqKDRAirD04HE3BqrC95VxP+l6lR3Tl3 YN/8m4k9jnpuOFznf9EH/vEh87Ih6EfYaVQzwINEhgluKnYziFMyiwpvATbapI/b0YKx yvoKHNNymmVnNYIu2fUdxoH8KnvmO8kKWYgSTvJvEmhfkwQSpJQqp4s/p2OtADNWcryd 712A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=4tbUqpNoeGZsdiZGUxJuKmD9bm8bPn756ai7jm7qcXY=; b=hlvwYAuVoCf7rzSo2AnGu8i12bTvHRtEOfDg85hmaU/jp711/Q/bkXlryon9c/yzT0 ui6AbyVuTG9/LK1V5uoHxnaflnZJhlsvmD9famSxjW67Jyy5xReN6NRnhoM8MxJx6AJw 8QhfKUzoWuTVY/ei07BDrKHQ+uMHG5kai3Qvr8aA95IkvAnHHQh4IQgvtrxBYyhUmOr2 nvn4+9W/R9rCusHCOOye/J7QGzuhiWxhW9phYZ66BwDmmocw7IMSX4Q8Pzkj3/vwhpLN x5S5ruNSK3AynBB3sTbmnASTUGJWjFxRd7luJ1ybZ7mcVBODB0js2ZAffuRkGOB7O48V ywPA== X-Gm-Message-State: AE9vXwPAHxgXKdA+CBdlZm4vp43A5Myui5RNyhwaWxN5+mrBVev8wSoXmo3Ge09LVX0DQQ== X-Received: by 10.66.67.51 with SMTP id k19mr12538106pat.55.1473930297446; Thu, 15 Sep 2016 02:04:57 -0700 (PDT) Received: from roar.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id ps2sm3457017pab.10.2016.09.15.02.04.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 15 Sep 2016 02:04:56 -0700 (PDT) From: Nicholas Piggin To: Michael Ellerman , linuxppc-dev@lists.ozlabs.org Subject: [PATCH] powerpc/64s: exception optimise MSR handling Date: Thu, 15 Sep 2016 19:04:46 +1000 Message-Id: <20160915090446.898-1-npiggin@gmail.com> X-Mailer: git-send-email 2.9.3 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Nicholas Piggin Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" mtmsrd with L=1 only affects MSR_EE and MSR_RI bits, and we always know what state those bits are, so the kernel MSR does not need to be loaded when modifying them. mtmsrd is often in the critical execution path, so avoiding dependency on even L1 load is noticable. On a POWER8 this saves about 3 cycles from the syscall path, and possibly a few from other exception returns (not measured). Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/entry_64.S | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index 6b8bc0d..585b9ca 100644 --- a/arch/powerpc/kernel/entry_64.S +++ b/arch/powerpc/kernel/entry_64.S @@ -139,7 +139,7 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR) #ifdef CONFIG_PPC_BOOK3E wrteei 1 #else - ld r11,PACAKMSR(r13) + li r11,MSR_RI ori r11,r11,MSR_EE mtmsrd r11,1 #endif /* CONFIG_PPC_BOOK3E */ @@ -195,7 +195,6 @@ system_call: /* label this so stack traces look sane */ #ifdef CONFIG_PPC_BOOK3E wrteei 0 #else - ld r10,PACAKMSR(r13) /* * For performance reasons we clear RI the same time that we * clear EE. We only need to clear RI just before we restore r13 @@ -203,8 +202,7 @@ system_call: /* label this so stack traces look sane */ * We have to be careful to restore RI if we branch anywhere from * here (eg syscall_exit_work). */ - li r9,MSR_RI - andc r11,r10,r9 + li r11,0 mtmsrd r11,1 #endif /* CONFIG_PPC_BOOK3E */ @@ -221,13 +219,12 @@ system_call: /* label this so stack traces look sane */ #endif 2: addi r3,r1,STACK_FRAME_OVERHEAD #ifdef CONFIG_PPC_BOOK3S + li r10,MSR_RI mtmsrd r10,1 /* Restore RI */ #endif bl restore_math #ifdef CONFIG_PPC_BOOK3S - ld r10,PACAKMSR(r13) - li r9,MSR_RI - andc r11,r10,r9 /* Re-clear RI */ + li r11,0 mtmsrd r11,1 #endif ld r8,_MSR(r1) @@ -308,6 +305,7 @@ syscall_enosys: syscall_exit_work: #ifdef CONFIG_PPC_BOOK3S + li r10,MSR_RI mtmsrd r10,1 /* Restore RI */ #endif /* If TIF_RESTOREALL is set, don't scribble on either r3 or ccr. @@ -354,7 +352,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR) #ifdef CONFIG_PPC_BOOK3E wrteei 1 #else - ld r10,PACAKMSR(r13) + li r10,MSR_RI ori r10,r10,MSR_EE mtmsrd r10,1 #endif /* CONFIG_PPC_BOOK3E */ @@ -619,7 +617,7 @@ _GLOBAL(ret_from_except_lite) #ifdef CONFIG_PPC_BOOK3E wrteei 0 #else - ld r10,PACAKMSR(r13) /* Get kernel MSR without EE */ + li r10,MSR_RI mtmsrd r10,1 /* Update machine state */ #endif /* CONFIG_PPC_BOOK3E */ @@ -751,7 +749,7 @@ resume_kernel: #ifdef CONFIG_PPC_BOOK3E wrteei 0 #else - ld r10,PACAKMSR(r13) /* Get kernel MSR without EE */ + li r10,MSR_RI mtmsrd r10,1 /* Update machine state */ #endif /* CONFIG_PPC_BOOK3E */ #endif /* CONFIG_PREEMPT */ @@ -841,8 +839,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR) * userspace and we take an exception after restoring r13, * we end up corrupting the userspace r13 value. */ - ld r4,PACAKMSR(r13) /* Get kernel MSR without EE */ - andc r4,r4,r0 /* r0 contains MSR_RI here */ + li r4,0 mtmsrd r4,1 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM