From patchwork Mon Mar 28 19:24:54 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Scott Wood X-Patchwork-Id: 88669 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id 47FECB6FFD for ; Tue, 29 Mar 2011 06:26:22 +1100 (EST) Received: from TX2EHSOBE004.bigfish.com (tx2ehsobe002.messaging.microsoft.com [65.55.88.12]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Cybertrust SureServer Standard Validation CA" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 72567B6F8A for ; Tue, 29 Mar 2011 06:25:14 +1100 (EST) Received: from mail5-tx2-R.bigfish.com (10.9.14.246) by TX2EHSOBE004.bigfish.com (10.9.40.24) with Microsoft SMTP Server id 14.1.225.8; Mon, 28 Mar 2011 19:24:58 +0000 Received: from mail5-tx2 (localhost.localdomain [127.0.0.1]) by mail5-tx2-R.bigfish.com (Postfix) with ESMTP id 1D70012C81FE; Mon, 28 Mar 2011 19:24:58 +0000 (UTC) X-SpamScore: -3 X-BigFish: VS-3(zzbb2cKzz1202hzz8275bhz2dh2a8h637h668h62h) X-Spam-TCS-SCL: 1:0 X-Forefront-Antispam-Report: KIP:(null); UIP:(null); IPVD:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail5-tx2 (localhost.localdomain [127.0.0.1]) by mail5-tx2 (MessageSwitch) id 1301340297859592_2335; Mon, 28 Mar 2011 19:24:57 +0000 (UTC) Received: from TX2EHSMHS038.bigfish.com (unknown [10.9.14.248]) by mail5-tx2.bigfish.com (Postfix) with ESMTP id CDFCED38051; Mon, 28 Mar 2011 19:24:57 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS038.bigfish.com (10.9.99.138) with Microsoft SMTP Server (TLS) id 14.1.225.8; Mon, 28 Mar 2011 19:24:56 +0000 Received: from az33smr01.freescale.net (10.64.34.199) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server id 14.1.270.2; Mon, 28 Mar 2011 14:24:55 -0500 Received: from schlenkerla.am.freescale.net (schlenkerla.am.freescale.net [10.82.120.180]) by az33smr01.freescale.net (8.13.1/8.13.0) with ESMTP id p2SJOsw0027310; Mon, 28 Mar 2011 14:24:55 -0500 (CDT) Date: Mon, 28 Mar 2011 14:24:54 -0500 From: Scott Wood To: Subject: [PATCH 1/4] powerpc/e500v2: Save SPEFCSR in flush_spe_to_thread() Message-ID: <20110328192454.GA11064@schlenkerla.am.freescale.net> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.5.20 (2009-06-14) X-OriginatorOrg: freescale.com Cc: linuxppc-dev@lists.ozlabs.org X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org From: yu liu giveup_spe() saves the SPE state which is protected by MSR[SPE]. However, modifying SPEFSCR does not trap when MSR[SPE]=0. And since SPEFSCR is already saved/restored in _switch(), not all the callers want to save SPEFSCR again. Thus, saving SPEFSCR should not belong to giveup_spe(). This patch moves SPEFSCR saving to flush_spe_to_thread(), and cleans up the caller that needs to save SPEFSCR accordingly. Signed-off-by: Liu Yu Signed-off-by: Scott Wood --- Kumar, could you ack this to go via the KVM tree, since the KVM SPE save/restore patches depend on it? arch/powerpc/kernel/head_fsl_booke.S | 2 -- arch/powerpc/kernel/process.c | 1 + arch/powerpc/kernel/traps.c | 5 +---- 3 files changed, 2 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index 3e02710..b84fc5e 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S @@ -792,8 +792,6 @@ _GLOBAL(giveup_spe) evmwumiaa evr6, evr6, evr6 /* evr6 <- ACC = 0 * 0 + ACC */ li r4,THREAD_ACC evstddx evr6, r4, r3 /* save off accumulator */ - mfspr r6,SPRN_SPEFSCR - stw r6,THREAD_SPEFSCR(r3) /* save spefscr register value */ beq 1f lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5) lis r3,MSR_SPE@h diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c index f74f355..138e7dd 100644 --- a/arch/powerpc/kernel/process.c +++ b/arch/powerpc/kernel/process.c @@ -213,6 +213,7 @@ void flush_spe_to_thread(struct task_struct *tsk) #ifdef CONFIG_SMP BUG_ON(tsk != current); #endif + tsk->thread.spefscr = mfspr(SPRN_SPEFSCR); giveup_spe(tsk); } preempt_enable(); diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index bd74fac..0ed23d1 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c @@ -1356,10 +1356,7 @@ void SPEFloatingPointException(struct pt_regs *regs) int code = 0; int err; - preempt_disable(); - if (regs->msr & MSR_SPE) - giveup_spe(current); - preempt_enable(); + flush_spe_to_thread(current); spefscr = current->thread.spefscr; fpexc_mode = current->thread.fpexc_mode;