@@ -254,8 +254,21 @@
/* If we are a Freescale core do a simple check so
* we dont have to keep adding cases in the future */
if (PVR_VER(pvr) & 0x8000) {
- maj = PVR_MAJ(pvr);
- min = PVR_MIN(pvr);
+ switch (PVR_VER(pvr)) {
+ case 0x8000: /* 7441/7450/7451, Voyager */
+ case 0x8001: /* 7445/7455, Apollo 6 */
+ case 0x8002: /* 7447/7457, Apollo 7 */
+ case 0x8003: /* 7447A, Apollo 7 PM */
+ case 0x8004: /* 7448, Apollo 8 */
+ case 0x800c: /* 7410, Nitro */
+ maj = ((pvr >> 8) & 0xF);
+ min = PVR_MIN(pvr);
+ break;
+ default: /* e500/book-e */
+ maj = PVR_MAJ(pvr);
+ min = PVR_MIN(pvr);
+ break;
+ }
} else {
switch (PVR_VER(pvr)) {
case 0x0020: /* 403 family */
Some 74xx cores by Freescale are using the configuration field instead of the major revision field for their revision number. This patch corrects the wrong behaviour for those ppc cores including my one. There is a reference document at Freecale. It decribes the PVR register. The patch is based on that pdf. You can find the document here: http://www.freescale.com/files/archives/doc/support_info/PPCPVR.pdf Signed-off-by: Martin Langer <martin-langer@gmx.de>