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Wed, 30 Oct 2019 17:00:01 +0000 (GMT) Received: from b03ledav004.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B4AB678077; Wed, 30 Oct 2019 17:00:01 +0000 (GMT) Received: from arbab-laptop.localdomain (unknown [9.53.179.210]) by b03ledav004.gho.boulder.ibm.com (Postfix) with ESMTP; Wed, 30 Oct 2019 17:00:01 +0000 (GMT) Received: by arbab-laptop.localdomain (Postfix, from userid 152845) id 7C2734654B1; Wed, 30 Oct 2019 12:00:00 -0500 (CDT) From: Reza Arbab To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH 11/11] powerpc/powernv: Add pnv_pci_ioda_dma_set_mask() Date: Wed, 30 Oct 2019 12:00:00 -0500 Message-Id: <1572454800-17976-12-git-send-email-arbab@linux.ibm.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1572454800-17976-1-git-send-email-arbab@linux.ibm.com> References: <1572454800-17976-1-git-send-email-arbab@linux.ibm.com> X-TM-AS-GCONF: 00 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-10-30_07:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1908290000 definitions=main-1910300150 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Donnellan , Alexey Kardashevskiy , Oliver O'Halloran , Alistair Popple , Paul Mackerras , Thomas Gleixner , Christoph Hellwig Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Change pnv_pci_ioda_iommu_bypass_supported() to have no side effects, by separating the part of the function that determines if bypass is supported from the part that actually attempts to configure it. Move the latter to a controller-specific dma_set_mask() callback. Signed-off-by: Reza Arbab --- arch/powerpc/platforms/powernv/Kconfig | 1 + arch/powerpc/platforms/powernv/pci-ioda.c | 30 ++++++++++++++++-------------- 2 files changed, 17 insertions(+), 14 deletions(-) diff --git a/arch/powerpc/platforms/powernv/Kconfig b/arch/powerpc/platforms/powernv/Kconfig index 938803eab0ad..6e6e27841764 100644 --- a/arch/powerpc/platforms/powernv/Kconfig +++ b/arch/powerpc/platforms/powernv/Kconfig @@ -17,6 +17,7 @@ config PPC_POWERNV select PPC_DOORBELL select MMU_NOTIFIER select FORCE_SMP + select ARCH_HAS_DMA_SET_MASK default y config OPAL_PRD diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c index 57e6a43d9a3a..5291464930ed 100644 --- a/arch/powerpc/platforms/powernv/pci-ioda.c +++ b/arch/powerpc/platforms/powernv/pci-ioda.c @@ -1854,32 +1854,33 @@ static bool pnv_pci_ioda_iommu_bypass_supported(struct pci_dev *pdev, u64 dma_mask) { struct pnv_ioda_pe *pe = pnv_ioda_get_pe(pdev); - bool bypass; if (WARN_ON(!pe)) return false; - bypass = pnv_ioda_pe_iommu_bypass_supported(pe, dma_mask); + return pnv_ioda_pe_iommu_bypass_supported(pe, dma_mask) || + pnv_phb3_iommu_bypass_supported(pe, dma_mask); +} + +static void pnv_pci_ioda_dma_set_mask(struct pci_dev *pdev, u64 mask) +{ + struct pnv_ioda_pe *pe = pnv_ioda_get_pe(pdev); + + if (!pe) + return; - if (!bypass && pnv_phb3_iommu_bypass_supported(pe, dma_mask)) { + if (!pnv_ioda_pe_iommu_bypass_supported(pe, mask) && + pnv_phb3_iommu_bypass_supported(pe, mask)) { /* Configure the bypass mode */ if (pnv_pci_ioda_dma_64bit_bypass(pe)) - return false; + return; /* 4GB offset bypasses 32-bit space */ pdev->dev.archdata.dma_offset = (1ULL << 32); - - bypass = true; } - /* - * Update peer npu devices. We also do this for the special case where - * a 64-bit dma mask can't be fulfilled and falls back to default. - */ - if (bypass || !(dma_mask >> 32) || dma_mask == DMA_BIT_MASK(64)) - pnv_npu_try_dma_set_bypass(pdev, dma_mask); - - return bypass; + /* Update peer npu devices */ + pnv_npu_try_dma_set_bypass(pdev, mask); } static void pnv_ioda_setup_bus_dma(struct pnv_ioda_pe *pe, struct pci_bus *bus) @@ -3612,6 +3613,7 @@ static void pnv_pci_ioda_shutdown(struct pci_controller *hose) static const struct pci_controller_ops pnv_pci_ioda_controller_ops = { .dma_dev_setup = pnv_pci_dma_dev_setup, .dma_bus_setup = pnv_pci_dma_bus_setup, + .dma_set_mask = pnv_pci_ioda_dma_set_mask, .iommu_bypass_supported = pnv_pci_ioda_iommu_bypass_supported, .setup_msi_irqs = pnv_setup_msi_irqs, .teardown_msi_irqs = pnv_teardown_msi_irqs,