From patchwork Wed May 23 07:01:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Guo X-Patchwork-Id: 918842 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40rQCD2Slwz9s1b for ; Wed, 23 May 2018 18:09:12 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="sUhbRpAt"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 40rQCD0v7HzDsC1 for ; Wed, 23 May 2018 18:09:12 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="sUhbRpAt"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:400e:c05::242; helo=mail-pg0-x242.google.com; envelope-from=wei.guo.simon@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="sUhbRpAt"; dkim-atps=neutral Received: from mail-pg0-x242.google.com (mail-pg0-x242.google.com [IPv6:2607:f8b0:400e:c05::242]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 40rPkG4fczzDrnr for ; Wed, 23 May 2018 17:47:34 +1000 (AEST) Received: by mail-pg0-x242.google.com with SMTP id w3-v6so9027358pgv.12 for ; Wed, 23 May 2018 00:47:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ueCiwcpqAxD1BtaHJg3J94AJ1Umzn/X3IWlf44p+/v4=; b=sUhbRpAtpWJVZ5NhjNgor78aKw9DtKpMadQgnmkqWapYMjlb9BHgh3N8qBkR9/BvgH eoOEfonvscnUDHBu25pLl5aMsNEoJK1YLipUSJdEuxsGErXOQAR5pb6ni/HGfS2Yw5Ob 4Q3hbSTAr2xs7J6NPc2GFQROD2ghZcaFNWtktNB+O/+S0rgnpf1DQtAL+O9SK2cL1JrF mTv24O7W2iy+HT40Uic1vomgN6okNBMHKxclUm4kggfbFOI/c7SsA9vy2KLxtN3vNiTo 1n+oQ7l+bhMOq+8Q2lEd8zqSnvpOw1+J7kgYD+rE5ztI0W4JOElmhLfvFhIrWp1uAm04 qQ+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ueCiwcpqAxD1BtaHJg3J94AJ1Umzn/X3IWlf44p+/v4=; b=mNSBpekDs4+XQazL4xqfRi+5xqbfIQXEwguIDcKD/BW2KUav0czsczXkTYyegeA+3P EmSjZ00zxli2y0WctlQAJRK74gTcUhGNotcOENBOd7B+HABB0Z/RX3WoMkz9z9ECgj74 EXFD8QmzNQhX3WRvbcEXSO64pXm7Ia2PDPicG8w9AsA5BqFOQ4J5+zW8GuDgBZmRXSo4 gAjyRQh6ZoIuJMuiThFBPRyHnKG5Bf1ym/GsP3do6izRj/+rQLBVJ0GSCBh1h1ghVULw cBYW6nHszDSeekgzA0q9vZ11OCNwowMmC/znwC64DI/UqLTt/Dr0Ud7p2nPXLiesqK7a G8RQ== X-Gm-Message-State: ALKqPwcR613VBAfBpIe2Ma+LRhiWXUktjuQ3B1b0juMtHo8J8MP8cgCJ XJksDipPasJgSN6IPiot4VNfHw== X-Google-Smtp-Source: AB8JxZrFqArefOISkQdI2tp+Wq36pj1UnbPhwDOE38FvmmwkseGb7bPdALNFT21Z6WV9kNvdcZpZJA== X-Received: by 2002:a62:98cb:: with SMTP id d72-v6mr1815001pfk.98.1527061652693; Wed, 23 May 2018 00:47:32 -0700 (PDT) Received: from simonLocalRHEL7.cn.ibm.com ([112.73.0.89]) by smtp.gmail.com with ESMTPSA id a4-v6sm39079171pfj.19.2018.05.23.00.47.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 23 May 2018 00:47:32 -0700 (PDT) From: wei.guo.simon@gmail.com To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v4 07/29] KVM: PPC: Book3S PR: add C function wrapper for _kvmppc_save/restore_tm() Date: Wed, 23 May 2018 15:01:50 +0800 Message-Id: <1527058932-7434-8-git-send-email-wei.guo.simon@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1527058932-7434-1-git-send-email-wei.guo.simon@gmail.com> References: <1527058932-7434-1-git-send-email-wei.guo.simon@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Simon Guo , kvm-ppc@vger.kernel.org, kvm@vger.kernel.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Simon Guo Currently _kvmppc_save/restore_tm() APIs can only be invoked from assembly function. This patch adds C function wrappers for them so that they can be safely called from C function. Signed-off-by: Simon Guo --- arch/powerpc/include/asm/asm-prototypes.h | 6 ++ arch/powerpc/kvm/book3s_hv_rmhandlers.S | 8 +-- arch/powerpc/kvm/tm.S | 94 ++++++++++++++++++++++++++++++- 3 files changed, 102 insertions(+), 6 deletions(-) diff --git a/arch/powerpc/include/asm/asm-prototypes.h b/arch/powerpc/include/asm/asm-prototypes.h index dfdcb23..5da683b 100644 --- a/arch/powerpc/include/asm/asm-prototypes.h +++ b/arch/powerpc/include/asm/asm-prototypes.h @@ -141,7 +141,13 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4, void pnv_power9_force_smt4_catch(void); void pnv_power9_force_smt4_release(void); +/* Transaction memory related */ void tm_enable(void); void tm_disable(void); void tm_abort(uint8_t cause); + +struct kvm_vcpu; +void _kvmppc_restore_tm_pr(struct kvm_vcpu *vcpu, u64 guest_msr); +void _kvmppc_save_tm_pr(struct kvm_vcpu *vcpu, u64 guest_msr); + #endif /* _ASM_POWERPC_ASM_PROTOTYPES_H */ diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S index 6445d29..980df5f 100644 --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S @@ -795,7 +795,7 @@ END_FTR_SECTION(CPU_FTR_TM | CPU_FTR_P9_TM_HV_ASSIST, 0) */ mr r3, r4 ld r4, VCPU_MSR(r3) - bl kvmppc_restore_tm + bl __kvmppc_restore_tm ld r4, HSTATE_KVM_VCPU(r13) 91: END_FTR_SECTION_IFSET(CPU_FTR_TM) @@ -1783,7 +1783,7 @@ END_FTR_SECTION(CPU_FTR_TM | CPU_FTR_P9_TM_HV_ASSIST, 0) */ mr r3, r9 ld r4, VCPU_MSR(r3) - bl kvmppc_save_tm + bl __kvmppc_save_tm ld r9, HSTATE_KVM_VCPU(r13) 91: #endif @@ -2689,7 +2689,7 @@ END_FTR_SECTION(CPU_FTR_TM | CPU_FTR_P9_TM_HV_ASSIST, 0) */ ld r3, HSTATE_KVM_VCPU(r13) ld r4, VCPU_MSR(r3) - bl kvmppc_save_tm + bl __kvmppc_save_tm 91: #endif @@ -2809,7 +2809,7 @@ END_FTR_SECTION(CPU_FTR_TM | CPU_FTR_P9_TM_HV_ASSIST, 0) */ mr r3, r4 ld r4, VCPU_MSR(r3) - bl kvmppc_restore_tm + bl __kvmppc_restore_tm ld r4, HSTATE_KVM_VCPU(r13) 91: #endif diff --git a/arch/powerpc/kvm/tm.S b/arch/powerpc/kvm/tm.S index b7057d5..42a7cd8 100644 --- a/arch/powerpc/kvm/tm.S +++ b/arch/powerpc/kvm/tm.S @@ -33,7 +33,7 @@ * This can modify all checkpointed registers, but * restores r1, r2 before exit. */ -_GLOBAL(kvmppc_save_tm) +_GLOBAL(__kvmppc_save_tm) mflr r0 std r0, PPC_LR_STKOFF(r1) stdu r1, -PPC_MIN_STKFRM(r1) @@ -210,6 +210,52 @@ END_FTR_SECTION_IFSET(CPU_FTR_P9_TM_HV_ASSIST) blr /* + * _kvmppc_save_tm_pr() is a wrapper around __kvmppc_save_tm(), so that it can + * be invoked from C function by PR KVM only. + */ +_GLOBAL(_kvmppc_save_tm_pr) + mflr r5 + std r5, PPC_LR_STKOFF(r1) + stdu r1, -SWITCH_FRAME_SIZE(r1) + SAVE_NVGPRS(r1) + + /* save MSR since TM/math bits might be impacted + * by __kvmppc_save_tm(). + */ + mfmsr r5 + SAVE_GPR(5, r1) + + /* also save DSCR/CR so that it can be recovered later */ + mfspr r6, SPRN_DSCR + SAVE_GPR(6, r1) + + mfcr r7 + stw r7, _CCR(r1) + + bl __kvmppc_save_tm + + ld r7, _CCR(r1) + mtcr r7 + + REST_GPR(6, r1) + mtspr SPRN_DSCR, r6 + + /* need preserve current MSR's MSR_TS bits */ + REST_GPR(5, r1) + mfmsr r6 + rldicl r6, r6, 64 - MSR_TS_S_LG, 62 + rldimi r5, r6, MSR_TS_S_LG, 63 - MSR_TS_T_LG + mtmsrd r5 + + REST_NVGPRS(r1) + addi r1, r1, SWITCH_FRAME_SIZE + ld r5, PPC_LR_STKOFF(r1) + mtlr r5 + blr + +EXPORT_SYMBOL_GPL(_kvmppc_save_tm_pr); + +/* * Restore transactional state and TM-related registers. * Called with: * - r3 pointing to the vcpu struct. @@ -219,7 +265,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_P9_TM_HV_ASSIST) * This potentially modifies all checkpointed registers. * It restores r1, r2 from the PACA. */ -_GLOBAL(kvmppc_restore_tm) +_GLOBAL(__kvmppc_restore_tm) mflr r0 std r0, PPC_LR_STKOFF(r1) @@ -362,4 +408,48 @@ END_FTR_SECTION_IFSET(CPU_FTR_P9_TM_HV_ASSIST) addi r1, r1, PPC_MIN_STKFRM b 9b #endif + +/* + * _kvmppc_restore_tm_pr() is a wrapper around __kvmppc_restore_tm(), so that it + * can be invoked from C function by PR KVM only. + */ +_GLOBAL(_kvmppc_restore_tm_pr) + mflr r5 + std r5, PPC_LR_STKOFF(r1) + stdu r1, -SWITCH_FRAME_SIZE(r1) + SAVE_NVGPRS(r1) + + /* save MSR to avoid TM/math bits change */ + mfmsr r5 + SAVE_GPR(5, r1) + + /* also save DSCR/CR so that it can be recovered later */ + mfspr r6, SPRN_DSCR + SAVE_GPR(6, r1) + + mfcr r7 + stw r7, _CCR(r1) + + bl __kvmppc_restore_tm + + ld r7, _CCR(r1) + mtcr r7 + + REST_GPR(6, r1) + mtspr SPRN_DSCR, r6 + + /* need preserve current MSR's MSR_TS bits */ + REST_GPR(5, r1) + mfmsr r6 + rldicl r6, r6, 64 - MSR_TS_S_LG, 62 + rldimi r5, r6, MSR_TS_S_LG, 63 - MSR_TS_T_LG + mtmsrd r5 + + REST_NVGPRS(r1) + addi r1, r1, SWITCH_FRAME_SIZE + ld r5, PPC_LR_STKOFF(r1) + mtlr r5 + blr + +EXPORT_SYMBOL_GPL(_kvmppc_restore_tm_pr); #endif