From patchwork Mon May 21 05:24:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Guo X-Patchwork-Id: 917414 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40q7sQ5tkYz9s0y for ; Mon, 21 May 2018 16:19:22 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Sj1aJtYa"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 40q7sQ4MzyzF11V for ; Mon, 21 May 2018 16:19:22 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Sj1aJtYa"; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:400e:c05::244; helo=mail-pg0-x244.google.com; envelope-from=wei.guo.simon@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="Sj1aJtYa"; dkim-atps=neutral Received: from mail-pg0-x244.google.com (mail-pg0-x244.google.com [IPv6:2607:f8b0:400e:c05::244]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 40q7RN0HylzDqV0 for ; Mon, 21 May 2018 16:00:15 +1000 (AEST) Received: by mail-pg0-x244.google.com with SMTP id d14-v6so2292203pgv.8 for ; Sun, 20 May 2018 23:00:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7BcmZYEoiQcWPcY+uu/9ACmRcD1y1CFnun5ifjzzHlo=; b=Sj1aJtYapABL4H39jVzUNBBE7P7Wc+AQ6LTBRmI6cV4bjQdsAldQU5U9ynm8DTiNFt 0PfD6E8Ix7lbY8meu1vUnv2M/GjyjIJ01/8lat1xspn0HUMbY1vfaRcsaKSJvDD9yZRo +hWtnzjcsoclyUQeOgKc+wiBfIoPQP4v7UC13YMIasmpfDqy18bqUNmX0ENFfatgU4JV 5D1PvsQ+buypzCmcBJu/8u80iM4Fz3AabXb+/av3l/5G4FupmHk6OQOaUu46YOnHPCfk FYJc2MX8c8Ykr+RqzJajUGtRklBLw3jAUvqPn427Qwl4SIk9YYke5bkRuCQpc2vEzxf6 /kfg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7BcmZYEoiQcWPcY+uu/9ACmRcD1y1CFnun5ifjzzHlo=; b=J60aSPtc5tK6D0yaDlq3S14zrt98wnLnRZsoXHI+lgYUObTmL2e2eAyqCCI8d4a407 z0azTgT6+UcXJTWayKpjxC/TDBe8l7z4FCPezGy9Zw/pJndksfICVwdChIQMdtXLlZNc OlLP9OH12BGtvFYZuYfUzlTloVoCIkvEF73roTG+1DdPbwFb4+YW+McfPlDRw7mewgWM XrqUEBSkx8ZobIBNRRvn8vrZEYZHS44g3GBt+JPiOLv/guSykZKomgaLUJrXdANdq/So G+J3VXY/Vp09y+Mt0v6kWCz+qG4hJyMiHwNafcU0kAdNG/jx644sXOSV9Lnflb+zgrfj TlsA== X-Gm-Message-State: ALKqPwfSVMtjZatBsyv9BPiwTKyXL+o9LDXqamErIdmVLRSmYrSdaMy5 24omFCs8QHcVt6ojb+RA5yM= X-Google-Smtp-Source: AB8JxZoANs0kG2PqhephXgpg4f0PSLRdSNVrfDvLL5GrypGanrFMarSUpfkCB6aiK71htrwOd4y7hQ== X-Received: by 2002:a63:6fcf:: with SMTP id k198-v6mr6930229pgc.307.1526882413707; Sun, 20 May 2018 23:00:13 -0700 (PDT) Received: from simonLocalRHEL7.cn.ibm.com ([112.73.0.89]) by smtp.gmail.com with ESMTPSA id g76-v6sm24424203pfj.102.2018.05.20.23.00.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 20 May 2018 23:00:13 -0700 (PDT) From: wei.guo.simon@gmail.com To: kvm-ppc@vger.kernel.org Subject: [PATCH v3 3/7] KVM: PPC: add giveup_ext() hook for PPC KVM ops Date: Mon, 21 May 2018 13:24:22 +0800 Message-Id: <1526880266-11291-4-git-send-email-wei.guo.simon@gmail.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1526880266-11291-1-git-send-email-wei.guo.simon@gmail.com> References: <1526880266-11291-1-git-send-email-wei.guo.simon@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Simon Guo , linuxppc-dev@lists.ozlabs.org, kvm@vger.kernel.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Simon Guo Currently HV will save math regs(FP/VEC/VSX) when trap into host. But PR KVM will only save math regs when qemu task switch out of CPU, or when returning from qemu code. To emulate FP/VEC/VSX mmio load, PR KVM need to make sure that math regs were flushed firstly and then be able to update saved VCPU FPR/VEC/VSX area reasonably. This patch adds giveup_ext() field to KVM ops and PR KVM has non-NULL giveup_ext() ops. kvmppc_complete_mmio_load() can invoke that hook (when not NULL) to flush math regs accordingly, before updating saved register vals. Math regs flush is also necessary for STORE, which will be covered in later patch within this patch series. Signed-off-by: Simon Guo --- arch/powerpc/include/asm/kvm_ppc.h | 1 + arch/powerpc/kvm/book3s_pr.c | 1 + arch/powerpc/kvm/powerpc.c | 9 +++++++++ 3 files changed, 11 insertions(+) diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h index 139cdf0..1f087c4 100644 --- a/arch/powerpc/include/asm/kvm_ppc.h +++ b/arch/powerpc/include/asm/kvm_ppc.h @@ -324,6 +324,7 @@ struct kvmppc_ops { int (*get_rmmu_info)(struct kvm *kvm, struct kvm_ppc_rmmu_info *info); int (*set_smt_mode)(struct kvm *kvm, unsigned long mode, unsigned long flags); + void (*giveup_ext)(struct kvm_vcpu *vcpu, ulong msr); }; extern struct kvmppc_ops *kvmppc_hv_ops; diff --git a/arch/powerpc/kvm/book3s_pr.c b/arch/powerpc/kvm/book3s_pr.c index 67061d3..be26636 100644 --- a/arch/powerpc/kvm/book3s_pr.c +++ b/arch/powerpc/kvm/book3s_pr.c @@ -1782,6 +1782,7 @@ static long kvm_arch_vm_ioctl_pr(struct file *filp, #ifdef CONFIG_PPC_BOOK3S_64 .hcall_implemented = kvmppc_hcall_impl_pr, #endif + .giveup_ext = kvmppc_giveup_ext, }; diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c index 45daf3b..8ce9e7b 100644 --- a/arch/powerpc/kvm/powerpc.c +++ b/arch/powerpc/kvm/powerpc.c @@ -1061,6 +1061,9 @@ static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu, kvmppc_set_gpr(vcpu, vcpu->arch.io_gpr, gpr); break; case KVM_MMIO_REG_FPR: + if (vcpu->kvm->arch.kvm_ops->giveup_ext) + vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu, MSR_FP); + VCPU_FPR(vcpu, vcpu->arch.io_gpr & KVM_MMIO_REG_MASK) = gpr; break; #ifdef CONFIG_PPC_BOOK3S @@ -1074,6 +1077,9 @@ static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu, #endif #ifdef CONFIG_VSX case KVM_MMIO_REG_VSX: + if (vcpu->kvm->arch.kvm_ops->giveup_ext) + vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu, MSR_VSX); + if (vcpu->arch.mmio_vsx_copy_type == KVMPPC_VSX_COPY_DWORD) kvmppc_set_vsr_dword(vcpu, gpr); else if (vcpu->arch.mmio_vsx_copy_type == KVMPPC_VSX_COPY_WORD) @@ -1088,6 +1094,9 @@ static void kvmppc_complete_mmio_load(struct kvm_vcpu *vcpu, #endif #ifdef CONFIG_ALTIVEC case KVM_MMIO_REG_VMX: + if (vcpu->kvm->arch.kvm_ops->giveup_ext) + vcpu->kvm->arch.kvm_ops->giveup_ext(vcpu, MSR_VEC); + kvmppc_set_vmx_dword(vcpu, gpr); break; #endif