@@ -612,8 +612,6 @@ static u64 timebase_read_xsl(struct cxl *adapter)
static void cxl_setup_psl_timebase(struct cxl *adapter, struct pci_dev *dev)
{
- u64 psl_tb;
- int delta;
unsigned int retry = 0;
struct device_node *np;
@@ -641,20 +639,25 @@ static void cxl_setup_psl_timebase(struct cxl *adapter, struct pci_dev *dev)
cxl_p1_write(adapter, CXL_PSL_Control, 0x0000000000000000);
cxl_p1_write(adapter, CXL_PSL_Control, CXL_PSL_Control_tb);
- /* Wait until CORE TB and PSL TB difference <= 16usecs */
- do {
- msleep(1);
- if (retry++ > 5) {
- dev_info(&dev->dev, "PSL timebase can't synchronize\n");
- return;
- }
- psl_tb = adapter->native->sl_ops->timebase_read(adapter);
- delta = mftb() - psl_tb;
- if (delta < 0)
- delta = -delta;
- } while (tb_to_ns(delta) > 16000);
-
- adapter->psl_timebase_synced = true;
+ if (cxl_is_power8()) {
+ u64 psl_tb;
+ int delta;
+
+ /* Wait until CORE TB and PSL TB difference <= 16usecs */
+ do {
+ msleep(1);
+ if (retry++ > 5) {
+ dev_info(&dev->dev, "PSL timebase can't synchronize\n");
+ return;
+ }
+ psl_tb = adapter->native->sl_ops->timebase_read(adapter);
+ delta = mftb() - psl_tb;
+ if (delta < 0)
+ delta = -delta;
+ } while (tb_to_ns(delta) > 16000);
+
+ adapter->psl_timebase_synced = true;
+ }
return;
}
@@ -63,6 +63,20 @@ static ssize_t psl_timebase_synced_show(struct device *device,
{
struct cxl *adapter = to_cxl_adapter(device);
+ /*
+ * On P9, the Timebase value is only updated as a result of
+ * PSL TimeBase command sent to CAPP.
+ */
+ if (cxl_is_power9()) {
+ u64 psl_tb;
+ int delta;
+
+ psl_tb = cxl_p1_read(adapter, CXL_PSL9_Timebase);
+ delta = mftb() - psl_tb;
+ if (delta < 0)
+ delta = -delta;
+ adapter->psl_timebase_synced = true ? tb_to_ns(delta) < 16000: false;
+ }
return scnprintf(buf, PAGE_SIZE, "%i\n", adapter->psl_timebase_synced);
}