From patchwork Mon Oct 9 06:46:37 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anju T Sudhakar X-Patchwork-Id: 823082 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3y9W6L3WdMz9tY0 for ; Mon, 9 Oct 2017 17:48:26 +1100 (AEDT) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3y9W6L1sgdzDr5x for ; Mon, 9 Oct 2017 17:48:26 +1100 (AEDT) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=anju@linux.vnet.ibm.com; receiver=) Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3y9W4V0YZ7zDqlv for ; Mon, 9 Oct 2017 17:46:49 +1100 (AEDT) Received: from pps.filterd (m0098413.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v996i6P0056211 for ; Mon, 9 Oct 2017 02:46:47 -0400 Received: from e06smtp12.uk.ibm.com (e06smtp12.uk.ibm.com [195.75.94.108]) by mx0b-001b2d01.pphosted.com with ESMTP id 2dg3xe8drp-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Mon, 09 Oct 2017 02:46:47 -0400 Received: from localhost by e06smtp12.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Mon, 9 Oct 2017 07:46:43 +0100 Received: from d23av05.au.ibm.com (d23av05.au.ibm.com [9.190.234.119]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v996kfKQ19726484 for ; Mon, 9 Oct 2017 06:46:42 GMT Received: from d23av05.au.ibm.com (localhost [127.0.0.1]) by d23av05.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id v996keoL002214 for ; Mon, 9 Oct 2017 17:46:41 +1100 Received: from xenial-xerus.in.ibm.com (xenial-xerus.in.ibm.com [9.124.35.47]) by d23av05.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id v996kcSD002116; Mon, 9 Oct 2017 17:46:38 +1100 From: Anju T Sudhakar To: mpe@ellerman.id.au Subject: [PATCH] powerpc/powernv: Add kernel cmdline parameter to disable imc Date: Mon, 9 Oct 2017 12:16:37 +0530 X-Mailer: git-send-email 2.7.4 X-TM-AS-MML: disable x-cbid: 17100906-0008-0000-0000-0000049DB3E2 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17100906-0009-0000-0000-00001E2F2E94 Message-Id: <1507531597-25947-1-git-send-email-anju@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-10-09_01:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1710090099 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.24 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: hemant@linux.vnet.ibm.com, maddy@linux.vnet.ibm.com, linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org, anju@linux.vnet.ibm.com Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Add a kernel command line parameter option to disable In-Memory Collection (IMC) counters and add documentation. This helps in debug. Signed-off-by: Anju T Sudhakar Reviewed-By: Madhavan Srinivasan --- Documentation/admin-guide/kernel-parameters.txt | 7 +++++ arch/powerpc/platforms/powernv/opal-imc.c | 35 +++++++++++++++++++++++++ 2 files changed, 42 insertions(+) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 0549662..06a8da1 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -820,6 +820,13 @@ disable_ipv6= [IPV6] See Documentation/networking/ipv6.txt. + disable_imc= [PPC] + Format {nest | core | all} + Disable imc counters during boot. + nest----- Disable nest-imc counters. + core----- Disable core and thread imc counters. + all------ Disable nest, core and thread imc counters. + disable_mtrr_cleanup [X86] The kernel tries to adjust MTRR layout from continuous to discrete, to make X server driver able to add WB diff --git a/arch/powerpc/platforms/powernv/opal-imc.c b/arch/powerpc/platforms/powernv/opal-imc.c index 21f6531..e929f33 100644 --- a/arch/powerpc/platforms/powernv/opal-imc.c +++ b/arch/powerpc/platforms/powernv/opal-imc.c @@ -22,6 +22,28 @@ #include #include +static bool disable_nest_imc; +static bool disable_core_imc; + +/* + * diasble_imc=nest: skip the registration of nest pmus. + * disable_imc=core: skip the registration of core and thread pmus. + * disable_imc=all : disables nest, core and thread. + */ +static int __init disable_imc_counters(char *p) +{ + if (strncmp(p, "nest", 4) == 0) + disable_nest_imc = true; + else if (strncmp(p, "core", 4) == 0) + disable_core_imc = true; + else if (strncmp(p, "all", 3) == 0) { + disable_nest_imc = true; + disable_core_imc = true; + } + return 0; +} +early_param("disable_imc", disable_imc_counters); + /* * imc_get_mem_addr_nest: Function to get nest counter memory region * for each chip @@ -169,6 +191,10 @@ static int opal_imc_counters_probe(struct platform_device *pdev) return -ENODEV; } + /* If kernel is booted with disable_imc parameters, then return */ + if (disable_nest_imc && disable_core_imc) + return -ENODEV; + for_each_compatible_node(imc_dev, NULL, IMC_DTB_UNIT_COMPAT) { if (of_property_read_u32(imc_dev, "type", &type)) { pr_warn("IMC Device without type property\n"); @@ -177,12 +203,21 @@ static int opal_imc_counters_probe(struct platform_device *pdev) switch (type) { case IMC_TYPE_CHIP: + if (disable_nest_imc) + continue; + domain = IMC_DOMAIN_NEST; break; case IMC_TYPE_CORE: + if (disable_core_imc) + continue; + domain =IMC_DOMAIN_CORE; break; case IMC_TYPE_THREAD: + if (disable_core_imc) + continue; + domain = IMC_DOMAIN_THREAD; break; default: