From patchwork Wed Sep 16 15:49:32 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boqun Feng X-Patchwork-Id: 518474 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 25D391401DA for ; Thu, 17 Sep 2015 01:58:19 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=yl8T0GN/; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id E04521A2DB4 for ; Thu, 17 Sep 2015 01:58:18 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=yl8T0GN/; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from mail-pa0-x22f.google.com (mail-pa0-x22f.google.com [IPv6:2607:f8b0:400e:c03::22f]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 0B1851A0620 for ; Thu, 17 Sep 2015 01:50:26 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=yl8T0GN/; dkim-atps=neutral Received: by padhk3 with SMTP id hk3so212553371pad.3 for ; Wed, 16 Sep 2015 08:50:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ATYX47+iU9MgTe6GI3kBmM7Bq2t/sYY8jQr681+XUws=; b=yl8T0GN/VwVJBYbwFl76MmdGTcgJsGFWIB0455MVS/WQp8vIXHNRxEI6/NfVZb89jr vWWfJK+bt14KpB/pGmBnqGZcVipG8YLZrvc8Z4A7MKNr+XcB3RCpnB8TffOXnLVgfR8I 7wwQEpJj016mSxw8BHBVMovfFASXAx80UaCaV62/CC73Gu5vBASBBGReBSH99Rx/dptX n2e/1bOeeatjwQAlIAlRa9fBA1UuuocO70vqo1D4LwqkYvNgJzxnCHQXi7nnv4isfveZ FGAwUKD0cyQEebvfzwea64Jn16FAHcHZvuJo6Sz6EyZ0r/Es3ozacNWnQ5I7uRqyhIw5 XgRw== X-Received: by 10.66.101.7 with SMTP id fc7mr60218067pab.57.1442418624043; Wed, 16 Sep 2015 08:50:24 -0700 (PDT) Received: from localhost (vm.fixme.name. [192.157.208.129]) by smtp.gmail.com with ESMTPSA id ql5sm28723125pac.46.2015.09.16.08.50.21 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 16 Sep 2015 08:50:22 -0700 (PDT) From: Boqun Feng To: linux-kernel@vger.kernel.org, linuxppc-dev@lists.ozlabs.org Subject: [RFC v2 4/7] powerpc: atomic: Implement xchg_* and atomic{, 64}_xchg_* variants Date: Wed, 16 Sep 2015 23:49:32 +0800 Message-Id: <1442418575-12297-5-git-send-email-boqun.feng@gmail.com> X-Mailer: git-send-email 2.5.1 In-Reply-To: <1442418575-12297-1-git-send-email-boqun.feng@gmail.com> References: <1442418575-12297-1-git-send-email-boqun.feng@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Waiman Long , Peter Zijlstra , Boqun Feng , Will Deacon , Paul Mackerras , Thomas Gleixner , "Paul E. McKenney" , Ingo Molnar MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Implement xchg_relaxed and define atomic{,64}_xchg_* as xchg_relaxed, based on these _relaxed variants, release/acquire variants can be built. Note that xchg_relaxed and atomic_{,64}_xchg_relaxed are not compiler barriers. Signed-off-by: Boqun Feng --- arch/powerpc/include/asm/atomic.h | 2 ++ arch/powerpc/include/asm/cmpxchg.h | 64 ++++++++++++++++++++++++++++++++++++++ 2 files changed, 66 insertions(+) diff --git a/arch/powerpc/include/asm/atomic.h b/arch/powerpc/include/asm/atomic.h index d1dcdcf..d9f570b 100644 --- a/arch/powerpc/include/asm/atomic.h +++ b/arch/powerpc/include/asm/atomic.h @@ -193,6 +193,7 @@ static __inline__ int atomic_dec_return(atomic_t *v) #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) +#define atomic_xchg_relaxed(v, new) xchg_relaxed(&((v)->counter), (new)) /** * __atomic_add_unless - add unless the number is a given value @@ -461,6 +462,7 @@ static __inline__ long atomic64_dec_if_positive(atomic64_t *v) #define atomic64_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) #define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) +#define atomic64_xchg_relaxed(v, new) xchg_relaxed(&((v)->counter), (new)) /** * atomic64_add_unless - add unless the number is a given value diff --git a/arch/powerpc/include/asm/cmpxchg.h b/arch/powerpc/include/asm/cmpxchg.h index ad6263c..66374f4 100644 --- a/arch/powerpc/include/asm/cmpxchg.h +++ b/arch/powerpc/include/asm/cmpxchg.h @@ -54,6 +54,32 @@ __xchg_u32_local(volatile void *p, unsigned long val) return prev; } +/* + * Atomic exchange relaxed + * + * Changes the memory location '*p' to be val and returns + * the previous value stored there. + * + * Note that this is not a compiler barrier, there is no order + * guarantee around. + */ +static __always_inline unsigned long +__xchg_u32_relaxed(u32 *p, unsigned long val) +{ + unsigned long prev; + + __asm__ __volatile__( +"1: lwarx %0,0,%2\n" + PPC405_ERR77(0, %2) +" stwcx. %3,0,%2\n" +" bne- 1b" + : "=&r" (prev), "+m" (*p) + : "r" (p), "r" (val) + : "cc"); + + return prev; +} + #ifdef CONFIG_PPC64 static __always_inline unsigned long __xchg_u64(volatile void *p, unsigned long val) @@ -90,6 +116,23 @@ __xchg_u64_local(volatile void *p, unsigned long val) return prev; } + +static __always_inline unsigned long +__xchg_u64_relaxed(u64 *p, unsigned long val) +{ + unsigned long prev; + + __asm__ __volatile__( +"1: ldarx %0,0,%2\n" + PPC405_ERR77(0, %2) +" stdcx. %3,0,%2\n" +" bne- 1b" + : "=&r" (prev), "+m" (*p) + : "r" (p), "r" (val) + : "cc"); + + return prev; +} #endif /* @@ -127,6 +170,21 @@ __xchg_local(volatile void *ptr, unsigned long x, unsigned int size) __xchg_called_with_bad_pointer(); return x; } + +static __always_inline unsigned long +__xchg_relaxed(void *ptr, unsigned long x, unsigned int size) +{ + switch (size) { + case 4: + return __xchg_u32_relaxed(ptr, x); +#ifdef CONFIG_PPC64 + case 8: + return __xchg_u64_relaxed(ptr, x); +#endif + } + __xchg_called_with_bad_pointer(); + return x; +} #define xchg(ptr,x) \ ({ \ __typeof__(*(ptr)) _x_ = (x); \ @@ -140,6 +198,12 @@ __xchg_local(volatile void *ptr, unsigned long x, unsigned int size) (unsigned long)_x_, sizeof(*(ptr))); \ }) +#define xchg_relaxed(ptr, x) \ +({ \ + __typeof__(*(ptr)) _x_ = (x); \ + (__typeof__(*(ptr))) __xchg_relaxed((ptr), \ + (unsigned long)_x_, sizeof(*(ptr))); \ +}) /* * Compare and exchange - if *p == old, set it to new, * and return the old value of *p.