From patchwork Thu Aug 13 11:51:36 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kevin Hao X-Patchwork-Id: 506980 X-Patchwork-Delegate: scottwood@freescale.com Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 0B6BF14027F for ; Thu, 13 Aug 2015 21:54:47 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=aqjCQEYi; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id D61461A1DC2 for ; Thu, 13 Aug 2015 21:54:46 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=aqjCQEYi; dkim-atps=neutral X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from mail-yk0-x231.google.com (mail-yk0-x231.google.com [IPv6:2607:f8b0:4002:c07::231]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 025171A1D59 for ; Thu, 13 Aug 2015 21:51:54 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=aqjCQEYi; dkim-atps=neutral Received: by ykay144 with SMTP id y144so38542628yka.3 for ; Thu, 13 Aug 2015 04:51:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=4r2M1jlGPzRielmWlkeIRGt7rW95KtBKhNQ7PtHu7q0=; b=aqjCQEYi7eACmKVFAS106LRB1vXbWnyx9SahAzuNh+E8PbNZF6WHmBXxb83JlQLcq4 VSrG3KCTyqFbvp7/5zu8fvKBFIhS9/xrFgqeeE4qWOR4T76QcVz/r2sykxR79Dpf3Onp lF9wQmvusEJIFEilk2c8XFbYtPhvkwDrptyqlYWEhLZtYuAxFl75NX2P3Epd+wHdvzTY LL7pwLRQNZmM11JH55dmiNGLwmnpn15A8YpEBRwztLaXAbubEIX8iLwWH7KWyQ+BWjXV hhOKv1OARAWgZlHeokm4E+TLzqIQkRzbEJ0P2eDHI4gdKMBMMaX5OsbpxztQM5XBtc6J mWUg== X-Received: by 10.13.196.66 with SMTP id g63mr919130ywd.97.1439466711581; Thu, 13 Aug 2015 04:51:51 -0700 (PDT) Received: from pek-khao-d1.corp.ad.wrs.com (unknown-178-22.windriver.com. [147.11.178.22]) by smtp.gmail.com with ESMTPSA id z193sm1815932ywd.24.2015.08.13.04.51.49 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 13 Aug 2015 04:51:50 -0700 (PDT) From: Kevin Hao To: Scott Wood Subject: [PATCH 2/3] powerpc/e6500: hw tablewalk: optimize a bit for tcd lock acquiring codes Date: Thu, 13 Aug 2015 19:51:36 +0800 Message-Id: <1439466697-18989-2-git-send-email-haokexin@gmail.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1439466697-18989-1-git-send-email-haokexin@gmail.com> References: <1439466697-18989-1-git-send-email-haokexin@gmail.com> X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linuxppc-dev@lists.ozlabs.org MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" It makes no sense to put the instructions for calculating the lock value (cpu number + 1) and the clearing of eq bit of cr1 in lbarx/stbcx loop. And when the lock is acquired by the other thread, the current lock value has no chance to equal with the lock value used by current cpu. So we can skip the comparing for these two lock values in the lbz/bne loop. Signed-off-by: Kevin Hao --- arch/powerpc/mm/tlb_low_64e.S | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S index 765b419883f2..e4185581c5a7 100644 --- a/arch/powerpc/mm/tlb_low_64e.S +++ b/arch/powerpc/mm/tlb_low_64e.S @@ -308,11 +308,11 @@ BEGIN_FTR_SECTION /* CPU_FTR_SMT */ * * MAS6:IND should be already set based on MAS4 */ -1: lbarx r15,0,r11 lhz r10,PACAPACAINDEX(r13) - cmpdi r15,0 - cmpdi cr1,r15,1 /* set cr1.eq = 0 for non-recursive */ addi r10,r10,1 + crclr cr1*4+eq /* set cr1.eq = 0 for non-recursive */ +1: lbarx r15,0,r11 + cmpdi r15,0 bne 2f stbcx. r10,0,r11 bne 1b @@ -320,9 +320,9 @@ BEGIN_FTR_SECTION /* CPU_FTR_SMT */ .subsection 1 2: cmpd cr1,r15,r10 /* recursive lock due to mcheck/crit/etc? */ beq cr1,3b /* unlock will happen if cr1.eq = 0 */ - lbz r15,0(r11) +10: lbz r15,0(r11) cmpdi r15,0 - bne 2b + bne 10b b 1b .previous