From patchwork Thu May 22 21:45:00 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Scott Wood X-Patchwork-Id: 351623 X-Patchwork-Delegate: scottwood@freescale.com Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id D5BF0140086 for ; Fri, 23 May 2014 07:46:00 +1000 (EST) Received: from ozlabs.org (ozlabs.org [103.22.144.67]) by lists.ozlabs.org (Postfix) with ESMTP id C34AD1A06BB for ; Fri, 23 May 2014 07:46:00 +1000 (EST) X-Original-To: linuxppc-dev@lists.ozlabs.org Delivered-To: linuxppc-dev@lists.ozlabs.org Received: from na01-bn1-obe.outbound.protection.outlook.com (mail-bn1blp0185.outbound.protection.outlook.com [207.46.163.185]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 21AE71A0085 for ; Fri, 23 May 2014 07:45:26 +1000 (EST) Received: from snotra.am.freescale.net (192.88.168.50) by DM2PR03MB400.namprd03.prod.outlook.com (10.141.84.153) with Microsoft SMTP Server (TLS) id 15.0.944.11; Thu, 22 May 2014 21:45:18 +0000 From: Scott Wood To: Subject: [PATCH 1/2] powerpc/e6500: hw tablewalk: clear TID in kernel indirect entries Date: Thu, 22 May 2014 16:45:00 -0500 Message-ID: <1400795101-8737-1-git-send-email-scottwood@freescale.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-Originating-IP: [192.88.168.50] X-ClientProxiedBy: DM2PR04CA057.namprd04.prod.outlook.com (10.141.154.175) To DM2PR03MB400.namprd03.prod.outlook.com (10.141.84.153) X-Forefront-PRVS: 021975AE46 X-Forefront-Antispam-Report: SFV:NSPM; SFS:(6009001)(428001)(189002)(199002)(88136002)(81542001)(36756003)(33646001)(62966002)(87976001)(101416001)(64706001)(81342001)(87286001)(74662001)(77156001)(74502001)(4396001)(89996001)(102836001)(31966008)(21056001)(50466002)(92726001)(85852003)(50226001)(77982001)(20776003)(19580405001)(47776003)(48376002)(80022001)(99396002)(66066001)(83322001)(42186004)(76482001)(79102001)(86362001)(92566001)(83072002)(46102001)(50986999)(93916002)(19580395003); DIR:OUT; SFP:; SCL:1; SRVR:DM2PR03MB400; H:snotra.am.freescale.net; FPR:; MLV:sfv; PTR:InfoNoRecords; MX:1; A:1; LANG:en; Received-SPF: None (: freescale.com does not designate permitted sender hosts) Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=scottwood@freescale.com; X-OriginatorOrg: freescale.com Cc: Scott Wood X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Previously TID was being cleared before the tlbsx, but not after. This can lead to a multiway hit between a TLB entry with TID=0 (previously inserted when PID=0) and a TLB entry with TID!=0 that matches PID. This can theoretically result in undefined behavior, though we probably get lucky due to the details of the overlap. It also results in the inability to use multihit detection to detect other conflicting TLB entries, as well as poorer TLB utilization due to duplicating kernel TLB entries. Rather than try to patch up MAS1 after tlbsx, the entire value is saved/restored as with MAS2. I observed a slight improvement in TLB miss performance with this patch applied. Signed-off-by: Scott Wood Reported-by: Ed Swarthout --- arch/powerpc/mm/tlb_low_64e.S | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S index 356e8b4..3298d10 100644 --- a/arch/powerpc/mm/tlb_low_64e.S +++ b/arch/powerpc/mm/tlb_low_64e.S @@ -322,19 +322,17 @@ tlb_miss_common_e6500: b 1b .previous - mfspr r15,SPRN_MAS2 + mfspr r15,SPRN_MAS1 + mfspr r10,SPRN_MAS2 tlbsx 0,r16 + mtspr SPRN_MAS2,r10 mfspr r10,SPRN_MAS1 + mtspr SPRN_MAS1,r15 + andis. r10,r10,MAS1_VALID@h bne tlb_miss_done_e6500 - /* Undo MAS-damage from the tlbsx */ - mfspr r10,SPRN_MAS1 - oris r10,r10,MAS1_VALID@h - mtspr SPRN_MAS1,r10 - mtspr SPRN_MAS2,r15 - /* Now, we need to walk the page tables. First check if we are in * range. */