From patchwork Fri Jan 10 23:30:56 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Scott Wood X-Patchwork-Id: 309451 X-Patchwork-Delegate: scottwood@freescale.com Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 5C6DC2C030F for ; Sat, 11 Jan 2014 10:31:36 +1100 (EST) Received: from na01-by2-obe.outbound.protection.outlook.com (mail-by2lp0236.outbound.protection.outlook.com [207.46.163.236]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 76BAF2C0084 for ; Sat, 11 Jan 2014 10:31:11 +1100 (EST) Received: from snotra.am.freescale.net (192.88.168.50) by BY2PR03MB396.namprd03.prod.outlook.com (10.141.141.26) with Microsoft SMTP Server (TLS) id 15.0.847.13; Fri, 10 Jan 2014 23:31:04 +0000 From: Scott Wood To: Subject: [PATCH v2] powerpc/booke-64: fix tlbsrx. path in bolted tlb handler Date: Fri, 10 Jan 2014 17:30:56 -0600 Message-ID: <1389396656-27813-1-git-send-email-scottwood@freescale.com> X-Mailer: git-send-email 1.8.3.2 MIME-Version: 1.0 X-Originating-IP: [192.88.168.50] X-ClientProxiedBy: DM2PR07CA020.namprd07.prod.outlook.com (10.141.154.178) To BY2PR03MB396.namprd03.prod.outlook.com (10.141.141.26) X-Forefront-PRVS: 00872B689F X-Forefront-Antispam-Report: SFV:NSPM; SFS:(10009001)(189002)(199002)(74706001)(83322001)(19580405001)(74876001)(89996001)(50466002)(85852003)(19580395003)(80976001)(83072002)(92566001)(81816001)(81542001)(56816005)(92726001)(90146001)(62966002)(36756003)(76176001)(47976001)(76786001)(59766001)(4396001)(47736001)(49866001)(50226001)(66066001)(77096001)(77156001)(85306002)(33646001)(79102001)(53806001)(54316002)(51856001)(48376002)(46102001)(74366001)(87976001)(65816001)(80022001)(87286001)(42186004)(88136002)(81342001)(69226001)(76796001)(81686001)(50986001)(77982001)(47446002)(74502001)(63696002)(56776001)(87266001)(74662001)(31966008)(76482001)(47776003)(93136001); DIR:OUT; SFP:1101; SCL:1; SRVR:BY2PR03MB396; H:snotra.am.freescale.net; CLIP:192.88.168.50; FPR:; RD:InfoNoRecords; MX:1; A:1; LANG:en; X-OriginatorOrg: freescale.com Cc: Scott Wood X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Scott Wood It was branching to the cleanup part of the non-bolted handler, which would have been bad if there were any chips with tlbsrx. that use the bolted handler. Signed-off-by: Scott Wood --- v2: rebase arch/powerpc/mm/tlb_low_64e.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S index 75f5d27..16250b1 100644 --- a/arch/powerpc/mm/tlb_low_64e.S +++ b/arch/powerpc/mm/tlb_low_64e.S @@ -136,7 +136,7 @@ BEGIN_MMU_FTR_SECTION */ PPC_TLBSRX_DOT(0,R16) ldx r14,r14,r15 /* grab pgd entry */ - beq normal_tlb_miss_done /* tlb exists already, bail */ + beq tlb_miss_done_bolted /* tlb exists already, bail */ MMU_FTR_SECTION_ELSE ldx r14,r14,r15 /* grab pgd entry */ ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_USE_TLBRSRV) @@ -192,6 +192,7 @@ ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_USE_TLBRSRV) mtspr SPRN_MAS7_MAS3,r15 tlbwe +tlb_miss_done_bolted: TLB_MISS_STATS_X(MMSTAT_TLB_MISS_NORM_OK) tlb_epilog_bolted rfi