diff mbox

[v2] powerpc/booke-64: fix tlbsrx. path in bolted tlb handler

Message ID 1389396656-27813-1-git-send-email-scottwood@freescale.com (mailing list archive)
State Accepted
Commit 1149e8a73ffea953d8d6615ee37bce820a3eaeb8
Delegated to: Scott Wood
Headers show

Commit Message

Scott Wood Jan. 10, 2014, 11:30 p.m. UTC 
From: Scott Wood <scott@tyr.buserror.net>

It was branching to the cleanup part of the non-bolted handler,
which would have been bad if there were any chips with tlbsrx.
that use the bolted handler.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
v2: rebase

 arch/powerpc/mm/tlb_low_64e.S | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

Comments

Benjamin Herrenschmidt Jan. 12, 2014, 11:27 p.m. UTC | #1 
On Fri, 2014-01-10 at 17:30 -0600, Scott Wood wrote:
> From: Scott Wood <scott@tyr.buserror.net>
> 
> It was branching to the cleanup part of the non-bolted handler,
> which would have been bad if there were any chips with tlbsrx.
> that use the bolted handler.
> 
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> v2: rebase

Ack.

>  arch/powerpc/mm/tlb_low_64e.S | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S
> index 75f5d27..16250b1 100644
> --- a/arch/powerpc/mm/tlb_low_64e.S
> +++ b/arch/powerpc/mm/tlb_low_64e.S
> @@ -136,7 +136,7 @@ BEGIN_MMU_FTR_SECTION
>  	 */
>  	PPC_TLBSRX_DOT(0,R16)
>  	ldx	r14,r14,r15		/* grab pgd entry */
> -	beq	normal_tlb_miss_done	/* tlb exists already, bail */
> +	beq	tlb_miss_done_bolted	/* tlb exists already, bail */
>  MMU_FTR_SECTION_ELSE
>  	ldx	r14,r14,r15		/* grab pgd entry */
>  ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_USE_TLBRSRV)
> @@ -192,6 +192,7 @@ ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_USE_TLBRSRV)
>  	mtspr	SPRN_MAS7_MAS3,r15
>  	tlbwe
>  
> +tlb_miss_done_bolted:
>  	TLB_MISS_STATS_X(MMSTAT_TLB_MISS_NORM_OK)
>  	tlb_epilog_bolted
>  	rfi
diff mbox

Patch

diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S
index 75f5d27..16250b1 100644
--- a/arch/powerpc/mm/tlb_low_64e.S
+++ b/arch/powerpc/mm/tlb_low_64e.S
@@ -136,7 +136,7 @@  BEGIN_MMU_FTR_SECTION
 	 */
 	PPC_TLBSRX_DOT(0,R16)
 	ldx	r14,r14,r15		/* grab pgd entry */
-	beq	normal_tlb_miss_done	/* tlb exists already, bail */
+	beq	tlb_miss_done_bolted	/* tlb exists already, bail */
 MMU_FTR_SECTION_ELSE
 	ldx	r14,r14,r15		/* grab pgd entry */
 ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_USE_TLBRSRV)
@@ -192,6 +192,7 @@  ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_USE_TLBRSRV)
 	mtspr	SPRN_MAS7_MAS3,r15
 	tlbwe
 
+tlb_miss_done_bolted:
 	TLB_MISS_STATS_X(MMSTAT_TLB_MISS_NORM_OK)
 	tlb_epilog_bolted
 	rfi