From patchwork Wed Dec 25 08:58:55 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 305103 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id E7C7C2C0122 for ; Wed, 25 Dec 2013 19:59:34 +1100 (EST) Received: from e39.co.us.ibm.com (e39.co.us.ibm.com [32.97.110.160]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4CF682C00B7 for ; Wed, 25 Dec 2013 19:59:08 +1100 (EST) Received: from /spool/local by e39.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Wed, 25 Dec 2013 01:59:04 -0700 Received: from d03dlp02.boulder.ibm.com (9.17.202.178) by e39.co.us.ibm.com (192.168.1.139) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Wed, 25 Dec 2013 01:59:03 -0700 Received: from b03cxnp07028.gho.boulder.ibm.com (b03cxnp07028.gho.boulder.ibm.com [9.17.130.15]) by d03dlp02.boulder.ibm.com (Postfix) with ESMTP id 8A28C3E40040 for ; Wed, 25 Dec 2013 01:59:02 -0700 (MST) Received: from d03av03.boulder.ibm.com (d03av03.boulder.ibm.com [9.17.195.169]) by b03cxnp07028.gho.boulder.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id rBP8wuDi9830744 for ; Wed, 25 Dec 2013 09:58:57 +0100 Received: from d03av03.boulder.ibm.com (localhost [127.0.0.1]) by d03av03.boulder.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id rBP8x1RZ016008 for ; Wed, 25 Dec 2013 01:59:01 -0700 Received: from shangw (shangw.cn.ibm.com [9.125.213.121]) by d03av03.boulder.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with SMTP id rBP8x0GP016000; Wed, 25 Dec 2013 01:59:00 -0700 Received: by shangw (Postfix, from userid 1000) id CE6CB3003E3; Wed, 25 Dec 2013 16:58:58 +0800 (CST) From: Gavin Shan To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH 3/4] powerpc/powernv: Detect PHB chip revision Date: Wed, 25 Dec 2013 16:58:55 +0800 Message-Id: <1387961936-20451-3-git-send-email-shangw@linux.vnet.ibm.com> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1387961936-20451-1-git-send-email-shangw@linux.vnet.ibm.com> References: <1387961936-20451-1-git-send-email-shangw@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 13122508-9332-0000-0000-000002978EE7 Cc: Gavin Shan X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" The patch intends to detect the PHB3 chip revision that was exported by the underly firmware. In turn, we can have different AER configuration for switch ports and endpoints accordingly. Signed-off-by: Gavin Shan --- arch/powerpc/platforms/powernv/pci-ioda.c | 5 +++++ arch/powerpc/platforms/powernv/pci.h | 1 + 2 files changed, 6 insertions(+) diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c index 2c6d173..aea45fa 100644 --- a/arch/powerpc/platforms/powernv/pci-ioda.c +++ b/arch/powerpc/platforms/powernv/pci-ioda.c @@ -1201,6 +1201,11 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np, else phb->model = PNV_PHB_MODEL_UNKNOWN; + /* Detect chip revision */ + prop32 = of_get_property(np, "ibm,revision", NULL); + if (prop32) + phb->rev = be32_to_cpup(prop32); + /* Parse 32-bit and IO ranges (if any) */ pci_process_bridge_OF_ranges(hose, np, !hose->global_number); diff --git a/arch/powerpc/platforms/powernv/pci.h b/arch/powerpc/platforms/powernv/pci.h index 911c24e..c5a0810 100644 --- a/arch/powerpc/platforms/powernv/pci.h +++ b/arch/powerpc/platforms/powernv/pci.h @@ -89,6 +89,7 @@ struct pnv_phb { struct pci_controller *hose; enum pnv_phb_type type; enum pnv_phb_model model; + u32 rev; u64 hub_id; u64 opal_id; void __iomem *regs;