From patchwork Tue Nov 19 05:17:06 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bharat Bhushan X-Patchwork-Id: 292267 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 1F1112C05FE for ; Tue, 19 Nov 2013 16:25:09 +1100 (EST) Received: from co1outboundpool.messaging.microsoft.com (co1ehsobe006.messaging.microsoft.com [216.32.180.189]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "MSIT Machine Auth CA 2" (not verified)) by ozlabs.org (Postfix) with ESMTPS id EED1C2C03DB for ; Tue, 19 Nov 2013 16:23:34 +1100 (EST) Received: from mail120-co1-R.bigfish.com (10.243.78.243) by CO1EHSOBE036.bigfish.com (10.243.66.101) with Microsoft SMTP Server id 14.1.225.22; Tue, 19 Nov 2013 05:23:30 +0000 Received: from mail120-co1 (localhost [127.0.0.1]) by mail120-co1-R.bigfish.com (Postfix) with ESMTP id B2D7AB003FA; Tue, 19 Nov 2013 05:23:30 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 8 X-BigFish: VS8(zzzz1f42h2148h208ch1ee6h1de0h1fdah2073h2146h1202h1e76h1d1ah1d2ah1fc6h1082kz70kd2iz1de098h8275bh1de097hz2dh2a8h839he5bhf0ah107ah1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1ad9h1b0ah1b2fh2222h224fh1fb3h1d0ch1d2eh1d3fh1dfeh1dffh1e1dh1e23h1fe8h1ff5h2218h2216h20cfi1155h) Received: from mail120-co1 (localhost.localdomain [127.0.0.1]) by mail120-co1 (MessageSwitch) id 1384838609228631_359; Tue, 19 Nov 2013 05:23:29 +0000 (UTC) Received: from CO1EHSMHS012.bigfish.com (unknown [10.243.78.230]) by mail120-co1.bigfish.com (Postfix) with ESMTP id 2B01D4C005B; Tue, 19 Nov 2013 05:23:29 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO1EHSMHS012.bigfish.com (10.243.66.22) with Microsoft SMTP Server (TLS) id 14.16.227.3; Tue, 19 Nov 2013 05:23:28 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-004.039d.mgd.msft.net (10.84.1.14) with Microsoft SMTP Server (TLS) id 14.3.158.2; Tue, 19 Nov 2013 05:23:27 +0000 Received: from freescale.com ([10.232.15.72]) by az84smr01.freescale.net (8.14.3/8.14.0) with SMTP id rAJ5NLnc005940; Mon, 18 Nov 2013 22:23:22 -0700 Received: by freescale.com (sSMTP sendmail emulation); Tue, 19 Nov 2013 10:47:33 +0530 From: Bharat Bhushan To: , , , , , , , , , Subject: [PATCH 2/9 v2] pci: msi: expose msi region information functions Date: Tue, 19 Nov 2013 10:47:06 +0530 Message-ID: <1384838233-24847-3-git-send-email-Bharat.Bhushan@freescale.com> X-Mailer: git-send-email 1.7.0.4 In-Reply-To: <1384838233-24847-1-git-send-email-Bharat.Bhushan@freescale.com> References: <1384838233-24847-1-git-send-email-Bharat.Bhushan@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% X-FOPE-CONNECTOR: Id%0$Dn%FREESCALE.MAIL.ONMICROSOFT.COM$RO%1$TLS%0$FQDN%$TlsDn% Cc: Bharat Bhushan X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.16rc2 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" So by now we have defined all the interfaces for getting the msi region, this patch expose the interface to linux subsystem. These will be used by vfio subsystem for setting up iommu for MSI interrupt of direct assignment devices. Signed-off-by: Bharat Bhushan --- v1->v2 - None include/linux/pci.h | 13 +++++++++++++ 1 files changed, 13 insertions(+), 0 deletions(-) diff --git a/include/linux/pci.h b/include/linux/pci.h index da172f9..c587034 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -1142,6 +1142,7 @@ struct msix_entry { u16 entry; /* driver uses to specify entry, OS writes */ }; +struct msi_region; #ifndef CONFIG_PCI_MSI static inline int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec) @@ -1184,6 +1185,16 @@ static inline int pci_msi_enabled(void) { return 0; } + +static inline int msi_get_region_count(void) +{ + return 0; +} + +static inline int msi_get_region(int region_num, struct msi_region *region) +{ + return 0; +} #else int pci_enable_msi_block(struct pci_dev *dev, unsigned int nvec); int pci_enable_msi_block_auto(struct pci_dev *dev, unsigned int *maxvec); @@ -1196,6 +1207,8 @@ void pci_disable_msix(struct pci_dev *dev); void msi_remove_pci_irq_vectors(struct pci_dev *dev); void pci_restore_msi_state(struct pci_dev *dev); int pci_msi_enabled(void); +int msi_get_region_count(void); +int msi_get_region(int region_num, struct msi_region *region); #endif #ifdef CONFIG_PCIEPORTBUS