From patchwork Wed Jul 25 09:26:59 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongtao Jia X-Patchwork-Id: 173131 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id A68172C067F for ; Wed, 25 Jul 2012 19:52:46 +1000 (EST) Received: from co1outboundpool.messaging.microsoft.com (co1ehsobe003.messaging.microsoft.com [216.32.180.186]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id D2EDF2C032E for ; Wed, 25 Jul 2012 19:50:39 +1000 (EST) Received: from mail111-co1-R.bigfish.com (10.243.78.232) by CO1EHSOBE002.bigfish.com (10.243.66.65) with Microsoft SMTP Server id 14.1.225.23; Wed, 25 Jul 2012 09:50:34 +0000 Received: from mail111-co1 (localhost [127.0.0.1]) by mail111-co1-R.bigfish.com (Postfix) with ESMTP id 73A9C14032F; Wed, 25 Jul 2012 09:50:34 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 5 X-BigFish: VS5(zz78fbmzz1202hzz8275bhz2dh2a8h668h839he5bhf0ah107ah) Received: from mail111-co1 (localhost.localdomain [127.0.0.1]) by mail111-co1 (MessageSwitch) id 1343209832746496_28638; Wed, 25 Jul 2012 09:50:32 +0000 (UTC) Received: from CO1EHSMHS021.bigfish.com (unknown [10.243.78.243]) by mail111-co1.bigfish.com (Postfix) with ESMTP id AA4C7CC004A; Wed, 25 Jul 2012 09:50:32 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by CO1EHSMHS021.bigfish.com (10.243.66.31) with Microsoft SMTP Server (TLS) id 14.1.225.23; Wed, 25 Jul 2012 09:50:32 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-003.039d.mgd.msft.net (10.84.1.16) with Microsoft SMTP Server (TLS) id 14.2.298.5; Wed, 25 Jul 2012 04:50:31 -0500 Received: from rock.am.freescale.net (rock.ap.freescale.net [10.193.20.106]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id q6P9oHNm002279; Wed, 25 Jul 2012 02:50:27 -0700 From: Jia Hongtao To: , , Subject: [PATCH V2 4/6] powerpc/mpc85xx: convert to unified PCI init Date: Wed, 25 Jul 2012 17:26:59 +0800 Message-ID: <1343208421-5552-4-git-send-email-B38951@freescale.com> X-Mailer: git-send-email 1.7.5.1 In-Reply-To: <1343208421-5552-1-git-send-email-B38951@freescale.com> References: <1343208421-5552-1-git-send-email-B38951@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: b38951@freescale.com X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" PCI initialization is now done by PCI controller driver. In board setup_arch stage we don't need PCI init any more but swiotlb should be determined at this stage. Signed-off-by: Jia Hongtao Signed-off-by: Li Yang --- We now just apply this for mpc85xx_ds and qemu arch/powerpc/platforms/85xx/mpc85xx_ds.c | 38 +++++++---------------------- arch/powerpc/platforms/85xx/qemu_e500.c | 5 +++- 2 files changed, 13 insertions(+), 30 deletions(-) diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index 6d3265f..3082ee8 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c @@ -117,40 +117,16 @@ void __init mpc85xx_ds_pic_init(void) extern int uli_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn); -static struct device_node *pci_with_uli; - static int mpc85xx_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn) { - if (hose->dn == pci_with_uli) + if (hose->is_primary) return uli_exclude_device(hose, bus, devfn); return PCIBIOS_SUCCESSFUL; } #endif /* CONFIG_PCI */ -static void __init mpc85xx_ds_pci_init(void) -{ -#ifdef CONFIG_PCI - struct device_node *node; - - fsl_pci_init(); - - /* See if we have a ULI under the primary */ - - node = of_find_node_by_name(NULL, "uli1575"); - while ((pci_with_uli = of_get_parent(node))) { - of_node_put(node); - node = pci_with_uli; - - if (pci_with_uli == fsl_pci_primary) { - ppc_md.pci_exclude_device = mpc85xx_exclude_device; - break; - } - } -#endif -} - /* * Setup the architecture */ @@ -159,7 +135,11 @@ static void __init mpc85xx_ds_setup_arch(void) if (ppc_md.progress) ppc_md.progress("mpc85xx_ds_setup_arch()", 0); - mpc85xx_ds_pci_init(); +#ifdef CONFIG_PCI + pci_check_swiotlb(); + ppc_md.pci_exclude_device = mpc85xx_exclude_device; +#endif + mpc85xx_smp_init(); printk("MPC85xx DS board from Freescale Semiconductor\n"); @@ -175,9 +155,9 @@ static int __init mpc8544_ds_probe(void) return !!of_flat_dt_is_compatible(root, "MPC8544DS"); } -machine_device_initcall(mpc8544_ds, mpc85xx_common_publish_devices); -machine_device_initcall(mpc8572_ds, mpc85xx_common_publish_devices); -machine_device_initcall(p2020_ds, mpc85xx_common_publish_devices); +machine_arch_initcall(mpc8544_ds, mpc85xx_common_publish_devices); +machine_arch_initcall(mpc8572_ds, mpc85xx_common_publish_devices); +machine_arch_initcall(p2020_ds, mpc85xx_common_publish_devices); machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier); machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier); diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c b/arch/powerpc/platforms/85xx/qemu_e500.c index 95a2e53..025c9c2 100644 --- a/arch/powerpc/platforms/85xx/qemu_e500.c +++ b/arch/powerpc/platforms/85xx/qemu_e500.c @@ -41,7 +41,10 @@ static void __init qemu_e500_setup_arch(void) { ppc_md.progress("qemu_e500_setup_arch()", 0); - fsl_pci_init(); +#ifdef CONFIG_PCI + pci_check_swiotlb(); +#endif + mpc85xx_smp_init(); }