From patchwork Wed Jul 25 09:26:58 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hongtao Jia X-Patchwork-Id: 173130 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 8DFA12C05B4 for ; Wed, 25 Jul 2012 19:52:07 +1000 (EST) Received: from am1outboundpool.messaging.microsoft.com (am1ehsobe001.messaging.microsoft.com [213.199.154.204]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 798B82C0092 for ; Wed, 25 Jul 2012 19:50:37 +1000 (EST) Received: from mail4-am1-R.bigfish.com (10.3.201.251) by AM1EHSOBE006.bigfish.com (10.3.204.26) with Microsoft SMTP Server id 14.1.225.23; Wed, 25 Jul 2012 09:50:31 +0000 Received: from mail4-am1 (localhost [127.0.0.1]) by mail4-am1-R.bigfish.com (Postfix) with ESMTP id 6434C1E00AC; Wed, 25 Jul 2012 09:50:31 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839he5bhf0ah107ah) Received: from mail4-am1 (localhost.localdomain [127.0.0.1]) by mail4-am1 (MessageSwitch) id 1343209829254872_9287; Wed, 25 Jul 2012 09:50:29 +0000 (UTC) Received: from AM1EHSMHS018.bigfish.com (unknown [10.3.201.226]) by mail4-am1.bigfish.com (Postfix) with ESMTP id 32850160043; Wed, 25 Jul 2012 09:50:29 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by AM1EHSMHS018.bigfish.com (10.3.207.156) with Microsoft SMTP Server (TLS) id 14.1.225.23; Wed, 25 Jul 2012 09:50:29 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.2.298.5; Wed, 25 Jul 2012 04:50:27 -0500 Received: from rock.am.freescale.net (rock.ap.freescale.net [10.193.20.106]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id q6P9oHNl002279; Wed, 25 Jul 2012 02:50:24 -0700 From: Jia Hongtao To: , , Subject: [PATCH V2 3/6] powerpc/fsl-pci: Determine primary bus by looking for ISA node Date: Wed, 25 Jul 2012 17:26:58 +0800 Message-ID: <1343208421-5552-3-git-send-email-B38951@freescale.com> X-Mailer: git-send-email 1.7.5.1 In-Reply-To: <1343208421-5552-1-git-send-email-B38951@freescale.com> References: <1343208421-5552-1-git-send-email-B38951@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: b38951@freescale.com X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" PCI host bridge is primary bus if it contains an ISA node. But not all boards fit this rule. Device tree should be updated for all these boards. Signed-off-by: Jia Hongtao Signed-off-by: Li Yang --- arch/powerpc/include/asm/pci-bridge.h | 1 + arch/powerpc/sysdev/fsl_pci.c | 31 ++++++++++++++++++++++++------- arch/powerpc/sysdev/fsl_pci.h | 12 +++++++++++- 3 files changed, 36 insertions(+), 8 deletions(-) diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h index ac39e6a..b48fa7f 100644 --- a/arch/powerpc/include/asm/pci-bridge.h +++ b/arch/powerpc/include/asm/pci-bridge.h @@ -20,6 +20,7 @@ struct device_node; struct pci_controller { struct pci_bus *bus; char is_dynamic; + int is_primary; #ifdef CONFIG_PPC64 int node; #endif diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index c473206..babeec6 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c @@ -453,6 +453,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary) hose->first_busno = bus_range ? bus_range[0] : 0x0; hose->last_busno = bus_range ? bus_range[1] : 0xff; + hose->is_primary = is_primary; setup_indirect_pci(hose, rsrc.start, rsrc.start + 0x4, PPC_INDIRECT_TYPE_BIG_ENDIAN); @@ -933,18 +934,34 @@ void pci_check_swiotlb(void) } #endif -int primary_phb_addr; +/* + * Recursively scan all the children nodes of parent and find out if there + * is "isa" node. Return 1 if parent has isa node otherwise return 0. + */ +int has_isa_node(struct device_node *parent) +{ + static int result; + struct device_node *cur_child; + + cur_child = NULL; + result = 0; + while (!result && (cur_child = of_get_next_child(parent, cur_child))) { + /* Get "isa" node and return 1 */ + if (of_node_cmp(cur_child->type, "isa") == 0) + return result = 1; + has_isa_node(cur_child); + } + + return result; +} + static int __devinit fsl_pci_probe(struct platform_device *pdev) { - struct pci_controller *hose; bool is_primary; + is_primary = has_isa_node(pdev->dev.of_node); - if (of_match_node(pci_ids, pdev->dev.of_node)) { - struct resource rsrc; - of_address_to_resource(pdev->dev.of_node, 0, &rsrc); - is_primary = ((rsrc.start & 0xfffff) == primary_phb_addr); + if (of_match_node(pci_ids, pdev->dev.of_node)) fsl_add_bridge(pdev->dev.of_node, is_primary); - } return 0; } diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h index c2c1de5..abbc09d 100644 --- a/arch/powerpc/sysdev/fsl_pci.h +++ b/arch/powerpc/sysdev/fsl_pci.h @@ -88,7 +88,17 @@ struct ccsr_pci { __be32 pex_err_cap_r3; /* 0x.e34 - PCIE error capture register 0 */ }; -extern int primary_phb_addr; + +#ifdef CONFIG_SUSPEND +struct fsl_pci_private_data { + int inbound_num; + struct pci_outbound_window_regs __iomem *pci_pow; + struct pci_inbound_window_regs __iomem *pci_piw; + void *saved_regs; +}; +#endif + +extern int is_has_isa_node(struct device_node *parent); extern int fsl_add_bridge(struct device_node *dev, int is_primary); extern void fsl_pcibios_fixup_bus(struct pci_bus *bus); extern int mpc83xx_add_bridge(struct device_node *dev);