From patchwork Fri Jul 20 12:21:46 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: shaohui xie X-Patchwork-Id: 172252 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id D2A2E2C0781 for ; Fri, 20 Jul 2012 22:47:36 +1000 (EST) Received: from db3outboundpool.messaging.microsoft.com (db3ehsobe003.messaging.microsoft.com [213.199.154.141]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 67B2C2C12BA for ; Fri, 20 Jul 2012 22:46:02 +1000 (EST) Received: from mail111-db3-R.bigfish.com (10.3.81.254) by DB3EHSOBE003.bigfish.com (10.3.84.23) with Microsoft SMTP Server id 14.1.225.23; Fri, 20 Jul 2012 12:45:56 +0000 Received: from mail111-db3 (localhost [127.0.0.1]) by mail111-db3-R.bigfish.com (Postfix) with ESMTP id 1743C3801A6 for ; Fri, 20 Jul 2012 12:45:56 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839he5bhf0ah107ah) Received: from mail111-db3 (localhost.localdomain [127.0.0.1]) by mail111-db3 (MessageSwitch) id 1342788353633219_5257; Fri, 20 Jul 2012 12:45:53 +0000 (UTC) Received: from DB3EHSMHS002.bigfish.com (unknown [10.3.81.246]) by mail111-db3.bigfish.com (Postfix) with ESMTP id 089E9340133 for ; Fri, 20 Jul 2012 12:45:53 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by DB3EHSMHS002.bigfish.com (10.3.87.102) with Microsoft SMTP Server (TLS) id 14.1.225.23; Fri, 20 Jul 2012 12:45:52 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-001.039d.mgd.msft.net (10.84.1.13) with Microsoft SMTP Server (TLS) id 14.2.298.5; Fri, 20 Jul 2012 07:45:51 -0500 Received: from localhost.localdomain (rock.ap.freescale.net [10.193.20.106]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id q6KCjlfm010211; Fri, 20 Jul 2012 05:45:48 -0700 From: Shaohui Xie To: Subject: [PATCH] powerpc/mm: add ZONE_NORMAL zone for 64 bit kernel Date: Fri, 20 Jul 2012 20:21:46 +0800 Message-ID: <1342786906-12634-1-git-send-email-Shaohui.Xie@freescale.com> X-Mailer: git-send-email 1.6.4 MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: Mingkai Hu , Shaohui Xie , Chen Yuanquan X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" PowerPC platform only supports ZONE_DMA zone for 64bit kernel, so all the memory will be put into this zone. If the memory size is greater than the device's DMA capability and device uses dma_alloc_coherent to allocate memory, it will get an address which is over the device's DMA addressing, the device will fail. So we split the memory to two zones by adding a zone ZONE_NORMAL, since we already allocate PCICSRBAR/PEXCSRBAR right below the 4G boundary (if the lowest PCI address is above 4G), so we constrain the DMA zone ZONE_DMA to 2GB, also, we clear the flag __GFP_DMA and set it only if the device's dma_mask < total memory size. By doing this, devices which cannot DMA all the memory will be limited to ZONE_DMA, but devices which can DMA all the memory will not be affected by this limitation. Signed-off-by: Shaohui Xie Signed-off-by: Mingkai Hu Signed-off-by: Chen Yuanquan --- arch/powerpc/kernel/dma.c | 13 ++++++++++++- arch/powerpc/mm/mem.c | 4 +++- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c index b1ec983..8029295 100644 --- a/arch/powerpc/kernel/dma.c +++ b/arch/powerpc/kernel/dma.c @@ -30,6 +30,7 @@ void *dma_direct_alloc_coherent(struct device *dev, size_t size, struct dma_attrs *attrs) { void *ret; + phys_addr_t top_ram_pfn = memblock_end_of_DRAM(); #ifdef CONFIG_NOT_COHERENT_CACHE ret = __dma_alloc_coherent(dev, size, dma_handle, flag); if (ret == NULL) @@ -40,8 +41,18 @@ void *dma_direct_alloc_coherent(struct device *dev, size_t size, struct page *page; int node = dev_to_node(dev); + /* + * check for crappy device which has dma_mask < ZONE_DMA, and + * we are not going to support it, just warn and fail. + */ + if (*dev->dma_mask < DMA_BIT_MASK(31)) { + dev_err(dev, "Unsupported dma_mask 0x%llx\n", *dev->dma_mask); + return NULL; + } /* ignore region specifiers */ - flag &= ~(__GFP_HIGHMEM); + flag &= ~(__GFP_HIGHMEM | __GFP_DMA); + if (*dev->dma_mask < top_ram_pfn - 1) + flag |= GFP_DMA; page = alloc_pages_node(node, flag, get_order(size)); if (page == NULL) diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c index baaafde..a494555 100644 --- a/arch/powerpc/mm/mem.c +++ b/arch/powerpc/mm/mem.c @@ -281,7 +281,9 @@ void __init paging_init(void) max_zone_pfns[ZONE_DMA] = lowmem_end_addr >> PAGE_SHIFT; max_zone_pfns[ZONE_HIGHMEM] = top_of_ram >> PAGE_SHIFT; #else - max_zone_pfns[ZONE_DMA] = top_of_ram >> PAGE_SHIFT; + max_zone_pfns[ZONE_DMA] = min_t(phys_addr_t, top_of_ram, + 1ull << 31) >> PAGE_SHIFT; + max_zone_pfns[ZONE_NORMAL] = top_of_ram >> PAGE_SHIFT; #endif free_area_init_nodes(max_zone_pfns);