From patchwork Fri Jul 13 02:27:35 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: tang yuantian X-Patchwork-Id: 170768 X-Patchwork-Delegate: galak@kernel.crashing.org Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 10A2F2C05C6 for ; Fri, 13 Jul 2012 12:50:03 +1000 (EST) Received: from am1outboundpool.messaging.microsoft.com (am1ehsobe004.messaging.microsoft.com [213.199.154.207]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 367BB2C02BB for ; Fri, 13 Jul 2012 12:49:07 +1000 (EST) Received: from mail43-am1-R.bigfish.com (10.3.201.253) by AM1EHSOBE003.bigfish.com (10.3.204.23) with Microsoft SMTP Server id 14.1.225.23; Fri, 13 Jul 2012 02:49:04 +0000 Received: from mail43-am1 (localhost [127.0.0.1]) by mail43-am1-R.bigfish.com (Postfix) with ESMTP id 896F2600A3 for ; Fri, 13 Jul 2012 02:49:04 +0000 (UTC) X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bhz2dh2a8h668h839hd24he5bhf0ah107ah) Received: from mail43-am1 (localhost.localdomain [127.0.0.1]) by mail43-am1 (MessageSwitch) id 1342147742521410_3527; Fri, 13 Jul 2012 02:49:02 +0000 (UTC) Received: from AM1EHSMHS003.bigfish.com (unknown [10.3.201.248]) by mail43-am1.bigfish.com (Postfix) with ESMTP id 7D63140049 for ; Fri, 13 Jul 2012 02:49:02 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by AM1EHSMHS003.bigfish.com (10.3.207.103) with Microsoft SMTP Server (TLS) id 14.1.225.23; Fri, 13 Jul 2012 02:49:02 +0000 Received: from az84smr01.freescale.net (10.64.34.197) by 039-SN1MMR1-002.039d.mgd.msft.net (10.84.1.15) with Microsoft SMTP Server (TLS) id 14.2.298.5; Thu, 12 Jul 2012 21:49:00 -0500 Received: from localhost (rock.ap.freescale.net [10.193.20.106]) by az84smr01.freescale.net (8.14.3/8.14.0) with ESMTP id q6D2mvjC011350; Thu, 12 Jul 2012 19:48:59 -0700 From: To: Subject: [PATCH] powerpc/85xx: Fix pci base address error for p2020rdb-pc in dts Date: Fri, 13 Jul 2012 10:27:35 +0800 Message-ID: <1342146455-27729-2-git-send-email-b29983@freescale.com> X-Mailer: git-send-email 1.6.4 In-Reply-To: <1342146455-27729-1-git-send-email-b29983@freescale.com> References: <1342146455-27729-1-git-send-email-b29983@freescale.com> MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: Tang Yuantian X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" From: Tang Yuantian Signed-off-by: Tang Yuantian --- arch/powerpc/boot/dts/p2020rdb-pc_32b.dts | 4 ++-- arch/powerpc/boot/dts/p2020rdb-pc_36b.dts | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts b/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts index 852e5b2..57573bd 100644 --- a/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts +++ b/arch/powerpc/boot/dts/p2020rdb-pc_32b.dts @@ -56,7 +56,7 @@ ranges = <0x0 0x0 0xffe00000 0x100000>; }; - pci0: pcie@ffe08000 { + pci2: pcie@ffe08000 { reg = <0 0xffe08000 0 0x1000>; status = "disabled"; }; @@ -76,7 +76,7 @@ }; }; - pci2: pcie@ffe0a000 { + pci0: pcie@ffe0a000 { reg = <0 0xffe0a000 0 0x1000>; ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>; diff --git a/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts b/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts index b5a56ca..470247e 100644 --- a/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts +++ b/arch/powerpc/boot/dts/p2020rdb-pc_36b.dts @@ -56,7 +56,7 @@ ranges = <0x0 0xf 0xffe00000 0x100000>; }; - pci0: pcie@fffe08000 { + pci2: pcie@fffe08000 { reg = <0xf 0xffe08000 0 0x1000>; status = "disabled"; }; @@ -76,7 +76,7 @@ }; }; - pci2: pcie@fffe0a000 { + pci0: pcie@fffe0a000 { reg = <0xf 0xffe0a000 0 0x1000>; ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;