From patchwork Wed Dec 28 09:41:21 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: shaohui xie X-Patchwork-Id: 133421 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id 469FBB72D8 for ; Wed, 28 Dec 2011 21:30:39 +1100 (EST) Received: from TX2EHSOBE006.bigfish.com (tx2ehsobe003.messaging.microsoft.com [65.55.88.13]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (Client CN "mail.global.frontbridge.com", Issuer "Microsoft Secure Server Authority" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id 03CF7B6FE0 for ; Wed, 28 Dec 2011 21:30:30 +1100 (EST) Received: from mail14-tx2-R.bigfish.com (10.9.14.241) by TX2EHSOBE006.bigfish.com (10.9.40.26) with Microsoft SMTP Server id 14.1.225.23; Wed, 28 Dec 2011 10:30:05 +0000 Received: from mail14-tx2 (localhost [127.0.0.1]) by mail14-tx2-R.bigfish.com (Postfix) with ESMTP id 12F412000E9; Wed, 28 Dec 2011 10:29:30 +0000 (UTC) X-SpamScore: 0 X-BigFish: VS0(zzzz1202hzz8275bh8275dhz2dh2a8h668h839h61h) X-Spam-TCS-SCL: 0:0 X-Forefront-Antispam-Report: CIP:70.37.183.190; KIP:(null); UIP:(null); IPV:NLI; H:mail.freescale.net; RD:none; EFVD:NLI Received: from mail14-tx2 (localhost.localdomain [127.0.0.1]) by mail14-tx2 (MessageSwitch) id 1325068169910015_17657; Wed, 28 Dec 2011 10:29:29 +0000 (UTC) Received: from TX2EHSMHS035.bigfish.com (unknown [10.9.14.240]) by mail14-tx2.bigfish.com (Postfix) with ESMTP id D70D3580045; Wed, 28 Dec 2011 10:29:29 +0000 (UTC) Received: from mail.freescale.net (70.37.183.190) by TX2EHSMHS035.bigfish.com (10.9.99.135) with Microsoft SMTP Server (TLS) id 14.1.225.23; Wed, 28 Dec 2011 10:30:26 +0000 Received: from az33smr02.freescale.net (10.64.34.200) by 039-SN1MMR1-003.039d.mgd.msft.net (10.84.1.16) with Microsoft SMTP Server id 14.1.355.3; Wed, 28 Dec 2011 04:30:25 -0600 Received: from localhost.localdomain (rock.ap.freescale.net [10.193.20.106]) by az33smr02.freescale.net (8.13.1/8.13.0) with ESMTP id pBSAULrR016245; Wed, 28 Dec 2011 04:30:23 -0600 (CST) From: Shaohui Xie To: Subject: [PATCH] mmc:sdhci: restore the enabled dma when do reset all Date: Wed, 28 Dec 2011 17:41:21 +0800 Message-ID: <1325065281-17785-1-git-send-email-Shaohui.Xie@freescale.com> X-Mailer: git-send-email 1.6.4 MIME-Version: 1.0 X-OriginatorOrg: freescale.com Cc: linuxppc-dev@lists.ozlabs.org, Shaohui Xie X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org If dma is enabled, it'll be cleared when reset all is performed, this can be observed on some platforms, such as P2041 which has a version 2.3 controller, but platform like P4080 which has a version 2.2 controller, does not suffer this, so we will check if the dma is enabled, we should restore it after reset all. Signed-off-by: Shaohui Xie --- based on http://git.kernel.org/pub/scm/linux/kernel/git/cjb/mmc.git, branch 'for-linus'. drivers/mmc/host/sdhci.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 19ed580..22033c3 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -29,6 +29,7 @@ #include #include "sdhci.h" +#include "sdhci-esdhc.h" #define DRIVER_NAME "sdhci" @@ -176,6 +177,7 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask) { unsigned long timeout; u32 uninitialized_var(ier); + u32 uninitialized_var(dma); if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) { if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & @@ -189,6 +191,8 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask) if (host->ops->platform_reset_enter) host->ops->platform_reset_enter(host, mask); + dma = sdhci_readl(host, ESDHC_DMA_SYSCTL); + sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET); if (mask & SDHCI_RESET_ALL) @@ -214,6 +218,9 @@ static void sdhci_reset(struct sdhci_host *host, u8 mask) if (host->quirks & SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET) sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK, ier); + + if ((dma & ESDHC_DMA_SNOOP) && (mask & SDHCI_RESET_ALL)) + sdhci_writel(host, dma, ESDHC_DMA_SYSCTL); } static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);