@@ -8,7 +8,7 @@
#if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
#define L1_CACHE_SHIFT 4
#define MAX_COPY_PREFETCH 1
-#elif defined(CONFIG_PPC_E500MC)
+#elif defined(CONFIG_FSL_E500MC)
#define L1_CACHE_SHIFT 6
#define MAX_COPY_PREFETCH 4
#elif defined(CONFIG_PPC32)
@@ -173,8 +173,8 @@ config SBC8560
config P2041_RDB
bool "Freescale P2041 RDB"
+ depends on FSL_E500MC
select DEFAULT_UIMAGE
- select PPC_E500MC
select PHYS_64BIT_DT_REQUIRED
select SWIOTLB
select ARCH_REQUIRE_GPIOLIB
@@ -187,8 +187,8 @@ config P2041_RDB
config P3041_DS
bool "Freescale P3041 DS"
+ depends on FSL_E500MC
select DEFAULT_UIMAGE
- select PPC_E500MC
select PHYS_64BIT_DT_REQUIRED
select SWIOTLB
select ARCH_REQUIRE_GPIOLIB
@@ -201,8 +201,8 @@ config P3041_DS
config P3060_QDS
bool "Freescale P3060 QDS"
+ depends on FSL_E500MC
select DEFAULT_UIMAGE
- select PPC_E500MC
select PHYS_64BIT_DT_REQUIRED
select SWIOTLB
select MPC8xxx_GPIO
@@ -214,8 +214,8 @@ config P3060_QDS
config P4080_DS
bool "Freescale P4080 DS"
+ depends on FSL_E500MC
select DEFAULT_UIMAGE
- select PPC_E500MC
select PHYS_64BIT_DT_REQUIRED
select SWIOTLB
select ARCH_REQUIRE_GPIOLIB
@@ -230,9 +230,9 @@ endif # PPC32
config P5020_DS
bool "Freescale P5020 DS"
+ depends on FSL_E500MC || PPC_BOOK3E_64
select DEFAULT_UIMAGE
select E500
- select PPC_E500MC
select PHYS_64BIT_DT_REQUIRED
select SWIOTLB
select ARCH_REQUIRE_GPIOLIB
@@ -38,6 +38,7 @@ config FSL_E500_V1_V2
config FSL_E500MC
bool "Freescale e500mc (also e5500 in 32-bit mode)"
select PHYS_64BIT_SUPPORTED
+ select PPC_FPU
select E500
select PPC_85xx
@@ -148,11 +149,6 @@ config E500
select PPC_FSL_BOOK3E
bool
-config PPC_E500MC
- bool "e500mc Support"
- select PPC_FPU
- depends on E500
-
config PPC_FPU
bool
default y if PPC64
@@ -280,7 +276,7 @@ config PPC_ICSWX
config SPE
bool "SPE Support"
- depends on FSL_E200 || (E500 && !PPC_E500MC)
+ depends on FSL_E200 || FSL_E500_V1_V2
default y
---help---
This option enables kernel support for the Signal Processing
This moves the "select PPC_FPU" from PPC_E500MC to the new FSL_E500MC processor selection, where it belongs. The only actual difference that this patch introduces is the P5020DS board (FreeScale e5500 CPU) will not set FSL_E500MC when building in 64-bit mode. This is OK as all of the existing code that the 64-bit P5020DS needs is still conditional on CONFIG_E500 or CONFIG_PPC_FPU, which are both set properly on the P5020DS (PPC_FPU is always enabled on 64-bit). Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> --- arch/powerpc/include/asm/cache.h | 2 +- arch/powerpc/platforms/85xx/Kconfig | 10 +++++----- arch/powerpc/platforms/Kconfig.cputype | 8 ++------ 3 files changed, 8 insertions(+), 12 deletions(-)