From patchwork Thu Feb 3 01:51:40 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Meador Inge X-Patchwork-Id: 81607 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from bilbo.ozlabs.org (localhost [127.0.0.1]) by ozlabs.org (Postfix) with ESMTP id DE194B7E64 for ; Thu, 3 Feb 2011 12:52:30 +1100 (EST) Received: from relay1.mentorg.com (relay1.mentorg.com [192.94.38.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "relay1.mentorg.com", Issuer "Entrust Certification Authority - L1B" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 81A46B7179; Thu, 3 Feb 2011 12:51:50 +1100 (EST) Received: from svr-orw-exc-10.mgc.mentorg.com ([147.34.98.58]) by relay1.mentorg.com with esmtp id 1PkoMO-0002I7-0D from meador_inge@mentor.com ; Wed, 02 Feb 2011 17:51:48 -0800 Received: from na2-mail.mgc.mentorg.com ([134.86.114.213]) by SVR-ORW-EXC-10.mgc.mentorg.com with Microsoft SMTPSVC(6.0.3790.4675); Wed, 2 Feb 2011 17:51:47 -0800 Received: from localhost.localdomain ([172.30.88.225]) by na2-mail.mgc.mentorg.com with Microsoft SMTPSVC(6.0.3790.3959); Wed, 2 Feb 2011 18:51:46 -0700 From: Meador Inge To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v2 3/3] powerpc: make MPIC honor the 'no-reset' device tree property Date: Wed, 2 Feb 2011 19:51:40 -0600 Message-Id: <1296697900-14004-4-git-send-email-meador_inge@mentor.com> X-Mailer: git-send-email 1.6.3.3 In-Reply-To: <1296697900-14004-1-git-send-email-meador_inge@mentor.com> References: <1296697900-14004-1-git-send-email-meador_inge@mentor.com> X-OriginalArrivalTime: 03 Feb 2011 01:51:46.0533 (UTC) FILETIME=[EA3E3950:01CBC344] Cc: devicetree-discuss@lists.ozlabs.org, Hollis Blanchard X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.13 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org This property, defined in the Open PIC binding, tells the kernel not to use the reset bit in the global configuration register. Additionally, its presence mandates that only sources which are actually used (i.e. appear in the device tree) should have their VECPRI bits initialized. Signed-off-by: Meador Inge CC: Hollis Blanchard CC: Benjamin Herrenschmidt --- arch/powerpc/include/asm/mpic.h | 4 ++- arch/powerpc/sysdev/mpic.c | 54 ++++++++++++++++++++++++++++++-------- 2 files changed, 45 insertions(+), 13 deletions(-) diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h index 9b94f18..688e3e0 100644 --- a/arch/powerpc/include/asm/mpic.h +++ b/arch/powerpc/include/asm/mpic.h @@ -322,6 +322,8 @@ struct mpic #ifdef CONFIG_PM struct mpic_irq_save *save_data; #endif + + int cpu; }; /* @@ -333,7 +335,7 @@ struct mpic */ /* This is the primary controller, only that one has IPIs and - * has afinity control. A non-primary MPIC always uses CPU0 + * has affinity control. A non-primary MPIC always uses CPU0 * registers only */ #define MPIC_PRIMARY 0x00000001 diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index a98f41d..5f17022 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c @@ -308,6 +308,15 @@ static inline void mpic_map(struct mpic *mpic, struct device_node *node, #define mpic_map(m,n,p,b,o,s) _mpic_map_mmio(m,p,b,o,s) #endif /* !CONFIG_PPC_DCR */ +static inline void mpic_init_vector(struct mpic *mpic, int source) +{ + /* start with vector = source number, and masked */ + u32 vecpri = MPIC_VECPRI_MASK | source | (8 << MPIC_VECPRI_PRIORITY_SHIFT); + + /* init hw */ + mpic_irq_write(source, MPIC_INFO(IRQ_VECTOR_PRI), vecpri); + mpic_irq_write(source, MPIC_INFO(IRQ_DESTINATION), 1 << mpic->cpu); +} /* Check if we have one of those nice broken MPICs with a flipped endian on @@ -622,6 +631,14 @@ static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int irq) return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]); } +/* Determine if the linux irq is a timer interrupt */ +static unsigned int mpic_is_timer_interrupt(struct mpic *mpic, unsigned int irq) +{ + unsigned int src = mpic_irq_to_hw(irq); + + return (src >= mpic->timer_vecs[0] && src <= mpic->timer_vecs[3]); +} + /* Convert a cpu mask from logical to physical cpu numbers. */ static inline u32 mpic_physmask(u32 cpumask) @@ -963,6 +980,15 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq, if (hw >= mpic->irq_count) return -EINVAL; + /* If the MPIC was reset, then all vectors have already been + * initialized. Otherwise, the appropriate vector needs to be + * initialized here to ensure that only used sources are setup with + * a vector. + */ + if (!(mpic->flags & MPIC_WANTS_RESET)) + if (!(mpic_is_ipi(mpic, hw) || mpic_is_timer_interrupt(mpic, hw))) + mpic_init_vector(mpic, hw); + mpic_msi_reserve_hwirq(mpic, hw); /* Default chip */ @@ -1129,7 +1155,16 @@ struct mpic * __init mpic_alloc(struct device_node *node, mpic_map(mpic, node, paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000); /* Reset */ - if (flags & MPIC_WANTS_RESET) { + + /* When using a device-node, reset requests are only honored if the MPIC + * is allowed to reset. + */ + if (node && of_get_property(node, "no-reset", NULL)) { + mpic->flags &= ~MPIC_WANTS_RESET; + } + + if (mpic->flags & MPIC_WANTS_RESET) { + printk(KERN_DEBUG "mpic: Resetting\n"); mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0), mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0)) | MPIC_GREG_GCONF_RESET); @@ -1246,7 +1281,6 @@ void __init mpic_set_default_senses(struct mpic *mpic, u8 *senses, int count) void __init mpic_init(struct mpic *mpic) { int i; - int cpu; BUG_ON(mpic->num_sources == 0); @@ -1290,18 +1324,14 @@ void __init mpic_init(struct mpic *mpic) mpic_pasemi_msi_init(mpic); if (mpic->flags & MPIC_PRIMARY) - cpu = hard_smp_processor_id(); + mpic->cpu = hard_smp_processor_id(); else - cpu = 0; + mpic->cpu = 0; - for (i = 0; i < mpic->num_sources; i++) { - /* start with vector = source number, and masked */ - u32 vecpri = MPIC_VECPRI_MASK | i | - (8 << MPIC_VECPRI_PRIORITY_SHIFT); - - /* init hw */ - mpic_irq_write(i, MPIC_INFO(IRQ_VECTOR_PRI), vecpri); - mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION), 1 << cpu); + if (mpic->flags & MPIC_WANTS_RESET) { + for (i = 0; i < mpic->num_sources; i++) { + mpic_init_vector(mpic, i); + } } /* Init spurious vector */