Message ID | cover.1549253769.git.sandipan@linux.ibm.com (mailing list archive) |
---|---|
Headers | show |
Series | powerpc: sstep: Emulation test infrastructure | expand |
Hi Sandipan, > This aims to add a test infrastructure for the in-kernel instruction > emulation code. This is currently limited to testing only the basic > integer operations and supports verification of the GPRs, LR, XER and > CR. > > There can be multiple test cases for each instruction. Each test case > has to be provided with the initial register state (in the form of a > struct pt_regs) and the 32-bit instruction to test. > > Apart from verifying the end result, problems with the behaviour of > certain instructions for things like setting certain bits in CR or > XER (which can also be processor dependent) can be identified. > For example, the newly introduced CA32 bit in XER, exclusive to P9 > CPUs as of now, was not being set when expected for some of the > arithmetic and shift instructions. With this infrastructure, it will > be easier to identify such problems and rectify them. The test cases > for the addc[.] instruction demonstrate this for different scenarios > where the CA and CA32 bits of XER should be set. > I forgot to mention this in my other emails - I think this is a really good idea, thank you for doing it. Regards, Daniel > Sandipan Das (5): > powerpc: Add bitmasks for D-form instruction fields > powerpc: Add bitmask for Rc instruction field > powerpc: sstep: Add instruction emulation selftests > powerpc: sstep: Add selftests for add[.] instruction > powerpc: sstep: Add selftests for addc[.] instruction > > arch/powerpc/Kconfig.debug | 5 + > arch/powerpc/include/asm/ppc-opcode.h | 5 + > arch/powerpc/lib/Makefile | 1 + > arch/powerpc/lib/exec_test_instr.S | 150 +++++++ > arch/powerpc/lib/sstep_tests.c | 564 ++++++++++++++++++++++++++ > 5 files changed, 725 insertions(+) > create mode 100644 arch/powerpc/lib/exec_test_instr.S > create mode 100644 arch/powerpc/lib/sstep_tests.c > > -- > 2.19.2