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Mon, 25 Mar 2024 05:53:15 +0000 (GMT) Received: from bgray-lenovo-p15.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id BFB15600B1; Mon, 25 Mar 2024 16:53:12 +1100 (AEDT) From: Benjamin Gray To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH v3 0/5] Add generic data patching functions Date: Mon, 25 Mar 2024 16:52:57 +1100 Message-ID: <20240325055302.876434-1-bgray@linux.ibm.com> X-Mailer: git-send-email 2.44.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 3INOg9850mC_cKAhzb3tnqpNanjrKWoL X-Proofpoint-GUID: 3INOg9850mC_cKAhzb3tnqpNanjrKWoL X-Proofpoint-UnRewURL: 0 URL was un-rewritten MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.1011,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2024-03-25_03,2024-03-21_02,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 priorityscore=1501 lowpriorityscore=0 mlxlogscore=726 spamscore=0 phishscore=0 clxscore=1011 impostorscore=0 suspectscore=0 malwarescore=0 adultscore=0 mlxscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2403210000 definitions=main-2403250030 X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Naveen N Rao , Benjamin Gray Errors-To: linuxppc-dev-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Linuxppc-dev" Currently patch_instruction() bases the write length on the value being written. If the value looks like a prefixed instruction it writes 8 bytes, otherwise it writes 4 bytes. This makes it potentially buggy to use for writing arbitrary data, as if you want to write 4 bytes but it decides to write 8 bytes it may clobber the following memory or be unaligned and trigger an oops if it tries to cross a page boundary. To solve this, this series pulls out the size parameter to the 'top' of the memory patching logic, and propagates it through the various functions. The two sizes supported are int and long; this allows for patching instructions and pointers on both ppc32 and ppc64. On ppc32 these are the same size, so care is taken to only use the size parameter on static functions, so the compiler can optimise it out entirely. Unfortunately GCC trips over its own feet here and won't optimise in a way that is optimal for strict RWX (mpc85xx_smp_defconfig) and no RWX (pmac32_defconfig). More details in the v2 cover letter. Changes from v2: * Various changes noted on each patch * Data patching now enforced to be aligned * Restore page aligned flushing optimisation Changes from v1: * Addressed the v1 review actions * Removed noinline (for now) v2: https://patchwork.ozlabs.org/project/linuxppc-dev/cover/20231016050147.115686-1-bgray@linux.ibm.com/ v1: https://patchwork.ozlabs.org/project/linuxppc-dev/cover/20230207015643.590684-1-bgray@linux.ibm.com/ Benjamin Gray (5): powerpc/code-patching: Add generic memory patching powerpc/code-patching: Add data patch alignment check powerpc/64: Convert patch_instruction() to patch_u32() powerpc/32: Convert patch_instruction() to patch_uint() powerpc/code-patching: Add boot selftest for data patching arch/powerpc/include/asm/code-patching.h | 37 +++++++++++++ arch/powerpc/kernel/module_64.c | 5 +- arch/powerpc/kernel/static_call.c | 2 +- arch/powerpc/lib/code-patching.c | 70 +++++++++++++++++++----- arch/powerpc/lib/test-code-patching.c | 36 ++++++++++++ arch/powerpc/platforms/powermac/smp.c | 2 +- 6 files changed, 132 insertions(+), 20 deletions(-) Acked-by: Naveen N Rao --- 2.44.0