| Message ID | 20201125155013.39955-1-clombard@linux.vnet.ibm.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | ocxl: Mmio invalidation support | expand |
On Wed, 25 Nov 2020 16:50:08 +0100, Christophe Lombard wrote: > OpenCAPI 4.0/5.0 with TLBI/SLBI Snooping, is not used due to performance > problems caused by the PAU having to process all incoming TLBI/SLBI > commands which will cause them to back up on the PowerBus. > > When the Address Translation Mode requires TLB operations to be initiated > using MMIO registers, a set of registers like the following is used: > • XTS MMIO ATSD0 LPARID register > • XTS MMIO ATSD0 AVA register > • XTS MMIO ATSD0 launch register, write access initiates a shoot down > • XTS MMIO ATSD0 status register > > [...] Applied to powerpc/next. [1/5] ocxl: Assign a register set to a Logical Partition https://git.kernel.org/powerpc/c/fc1347b5feb685073ce2108c68cd8147340be016 [2/5] ocxl: Initiate a TLB invalidate command https://git.kernel.org/powerpc/c/19b311ca51e108b6d8d679496af8635fdc1984a8 [3/5] ocxl: Update the Process Element Entry https://git.kernel.org/powerpc/c/d731feea00c7c1734c9697558f2a1962c12d2710 [4/5] ocxl: Add mmu notifier https://git.kernel.org/powerpc/c/5f686eea4b3cb1d311f02b81ce4264e66a21d979 [5/5] ocxl: Add new kernel traces https://git.kernel.org/powerpc/c/98f5559a439a68e0773f42352f7c0806cac9e76e cheers
OpenCAPI 4.0/5.0 with TLBI/SLBI Snooping, is not used due to performance problems caused by the PAU having to process all incoming TLBI/SLBI commands which will cause them to back up on the PowerBus. When the Address Translation Mode requires TLB operations to be initiated using MMIO registers, a set of registers like the following is used: • XTS MMIO ATSD0 LPARID register • XTS MMIO ATSD0 AVA register • XTS MMIO ATSD0 launch register, write access initiates a shoot down • XTS MMIO ATSD0 status register The MMIO based mechanism also blocks the NPU/PAU from snooping TLBIE commands from the PowerBus. The Shootdown commands (ATSD) will be generated using MMIO registers in the NPU/PAU and sent to the device. Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com> --- Changelog[v4] - Rebase to latest upstream. - Correct a typo in page size Changelog[v3] - Rebase to latest upstream. - Add page_size argument in pnv_ocxl_tlb_invalidate() - Remove double pointer Changelog[v2] - Rebase to latest upstream. - Create a set of smaller patches - Move the device tree parsing and ioremap() for the shootdown page in a platform-specific file (powernv) - Release the shootdown page in release_xsl() - Initialize atsd_lock - Move the code to initiate the TLB Invalidate command in a platform-specific file (powernv) - Use the notifier invalidate_range --- Christophe Lombard (5): ocxl: Assign a register set to a Logical Partition ocxl: Initiate a TLB invalidate command ocxl: Update the Process Element Entry ocxl: Add mmu notifier ocxl: Add new kernel traces arch/powerpc/include/asm/pnv-ocxl.h | 54 ++++++++++++ arch/powerpc/platforms/powernv/ocxl.c | 114 ++++++++++++++++++++++++++ drivers/misc/ocxl/context.c | 4 +- drivers/misc/ocxl/link.c | 70 +++++++++++++++- drivers/misc/ocxl/ocxl_internal.h | 9 +- drivers/misc/ocxl/trace.h | 64 +++++++++++++++ drivers/scsi/cxlflash/ocxl_hw.c | 6 +- include/misc/ocxl.h | 2 +- 8 files changed, 314 insertions(+), 9 deletions(-)