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[V2,0/7] powerpc/perf: Fixes for power10 PMU

Message ID 1606409684-1589-1-git-send-email-atrajeev@linux.vnet.ibm.com (mailing list archive)
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Series powerpc/perf: Fixes for power10 PMU | expand

Message

Athira Rajeev Nov. 26, 2020, 4:54 p.m. UTC
Patchset contains PMU fixes for power10.

This patchset contains 7 patches.
Patch1 includes fix to update event code with radix_scope_qual
bit in power10.
Patch2 and Patch3 updates the event group constraints for L2/L3
and threshold events in power10.
Patch4, patch5 and patch6 includes the event code changes for
l2/l3 events and some of the generic events.
Patch7 adds fixes for PMCCEXT bit in power10.

Changelog:
Changes from v1 -> v2
- Addressed Michael Ellerman's comments in the patchset.
  Split patch 2 to address l2l3 and threshold events
  group constraints fixes separately.
  Split Patch 3 also to address event code updates
  separately for generic and cache events.
  Fixed commit messages and also PMCCEXT bit setting
  during event enable.

Athira Rajeev (7):
  powerpc/perf: Fix to update radix_scope_qual in power10
  powerpc/perf: Update the PMU group constraints for l2l3 events in
    power10
  powerpc/perf: Fix the PMU group constraints for threshold events in
    power10
  powerpc/perf: Add generic and cache event list for power10 DD1
  powerpc/perf: Fix to update generic event codes for power10
  powerpc/perf: Fix to update cache events with l2l3 events in power10
  powerpc/perf: MMCR0 control for PMU registers under PMCC=00

 arch/powerpc/include/asm/reg.h          |   1 +
 arch/powerpc/kernel/cpu_setup_power.c   |   1 +
 arch/powerpc/kernel/dt_cpu_ftrs.c       |   1 +
 arch/powerpc/perf/core-book3s.c         |   4 +
 arch/powerpc/perf/isa207-common.c       |  35 ++++++-
 arch/powerpc/perf/isa207-common.h       |  16 ++-
 arch/powerpc/perf/power10-events-list.h |   9 ++
 arch/powerpc/perf/power10-pmu.c         | 178 ++++++++++++++++++++++++++++++--
 8 files changed, 231 insertions(+), 14 deletions(-)

Comments

Michael Ellerman Dec. 10, 2020, 11:29 a.m. UTC | #1
On Thu, 26 Nov 2020 11:54:37 -0500, Athira Rajeev wrote:
> Patchset contains PMU fixes for power10.
> 
> This patchset contains 7 patches.
> Patch1 includes fix to update event code with radix_scope_qual
> bit in power10.
> Patch2 and Patch3 updates the event group constraints for L2/L3
> and threshold events in power10.
> Patch4, patch5 and patch6 includes the event code changes for
> l2/l3 events and some of the generic events.
> Patch7 adds fixes for PMCCEXT bit in power10.
> 
> [...]

Applied to powerpc/next.

[1/7] powerpc/perf: Fix to update radix_scope_qual in power10
      https://git.kernel.org/powerpc/c/d3afd28cd2f35b2a1046b76e0cf010b684da2e84
[2/7] powerpc/perf: Update the PMU group constraints for l2l3 events in power10
      https://git.kernel.org/powerpc/c/e924be7b0b0d1f37d0509c854a92c7a71e3cdfe7
[3/7] powerpc/perf: Fix the PMU group constraints for threshold events in power10
      https://git.kernel.org/powerpc/c/0263bbb377af0c2d38bc8b2ad2ff147e240094de
[4/7] powerpc/perf: Add generic and cache event list for power10 DD1
      https://git.kernel.org/powerpc/c/c0e3985790251b307b7b71b687ed0128741b3f34
[5/7] powerpc/perf: Fix to update generic event codes for power10
      https://git.kernel.org/powerpc/c/1f12316394e3b241e70ed620ca846002c8ace3ec
[6/7] powerpc/perf: Fix to update cache events with l2l3 events in power10
      https://git.kernel.org/powerpc/c/9a8ee52634235993273c43ef67669d8168497dd7
[7/7] powerpc/perf: MMCR0 control for PMU registers under PMCC=00
      https://git.kernel.org/powerpc/c/91668ab7db4bcfae332e561df1de2401f3f18553

cheers