Message ID | 1595870184-1460-1-git-send-email-atrajeev@linux.vnet.ibm.com (mailing list archive) |
---|---|
Headers | show |
Series | powerpc/perf: Add support for perf extended regs in powerpc | expand |
> On 27-Jul-2020, at 10:46 PM, Athira Rajeev <atrajeev@linux.vnet.ibm.com> wrote: > > Patch set to add support for perf extended register capability in > powerpc. The capability flag PERF_PMU_CAP_EXTENDED_REGS, is used to > indicate the PMU which support extended registers. The generic code > define the mask of extended registers as 0 for non supported architectures. > > Patches 1 and 2 are the kernel side changes needed to include > base support for extended regs in powerpc and in power10. > Patches 3 and 4 are the perf tools side changes needed to support the > extended registers. > Hi Arnaldo, Jiri please let me know if you have any comments/suggestions on this patch series to add support for perf extended regs. Thanks Athira > patch 1/4 defines the PERF_PMU_CAP_EXTENDED_REGS mask to output the > values of mmcr0,mmcr1,mmcr2 for POWER9. Defines `PERF_REG_EXTENDED_MASK` > at runtime which contains mask value of the supported registers under > extended regs. > > patch 2/4 adds the extended regs support for power10 and exposes > MMCR3, SIER2, SIER3 registers as part of extended regs. > > Patch 3/4 and 4/4 adds extended regs to sample_reg_mask in the tool > side to use with `-I?` option for power9 and power10 respectively. > > Ravi bangoria found an issue with `perf record -I` while testing the > changes. The same issue is currently being worked on here: > https://lkml.org/lkml/2020/7/19/413 and will be resolved once fix > from Jin Yao is merged. > > This patch series is based on powerpc/next > > Changelog: > > Changes from v4 -> v5 > - initialize `perf_reg_extended_max` to work on > all platforms as suggested by Ravi Bangoria > - Added Reviewed-and-Tested-by from Ravi Bangoria > > Changes from v3 -> v4 > - Split the series and send extended regs as separate patch set here. > Link to previous series : > https://patchwork.ozlabs.org/project/linuxppc-dev/list/?series=190462&state=* > Other PMU patches are already merged in powerpc/next. > > - Fixed kernel build issue when using config having > CONFIG_PERF_EVENTS set and without CONFIG_PPC_PERF_CTRS > reported by kernel build bot. > - Included Reviewed-by from Kajol Jain. > - Addressed review comments from Ravi Bangoria to initialize `perf_reg_extended_max` > and define it in lowercase since it is local variable. > > Anju T Sudhakar (2): > powerpc/perf: Add support for outputting extended regs in perf > intr_regs > tools/perf: Add perf tools support for extended register capability in > powerpc > > Athira Rajeev (2): > powerpc/perf: Add extended regs support for power10 platform > tools/perf: Add perf tools support for extended regs in power10 > > arch/powerpc/include/asm/perf_event.h | 3 ++ > arch/powerpc/include/asm/perf_event_server.h | 5 +++ > arch/powerpc/include/uapi/asm/perf_regs.h | 20 ++++++++- > arch/powerpc/perf/core-book3s.c | 1 + > arch/powerpc/perf/perf_regs.c | 44 ++++++++++++++++++-- > arch/powerpc/perf/power10-pmu.c | 6 +++ > arch/powerpc/perf/power9-pmu.c | 6 +++ > tools/arch/powerpc/include/uapi/asm/perf_regs.h | 20 ++++++++- > tools/perf/arch/powerpc/include/perf_regs.h | 8 +++- > tools/perf/arch/powerpc/util/header.c | 9 +--- > tools/perf/arch/powerpc/util/perf_regs.c | 55 +++++++++++++++++++++++++ > tools/perf/arch/powerpc/util/utils_header.h | 15 +++++++ > 12 files changed, 178 insertions(+), 14 deletions(-) > create mode 100644 tools/perf/arch/powerpc/util/utils_header.h > > -- > 1.8.3.1 >
On Thu, Jul 30, 2020 at 01:24:40PM +0530, Athira Rajeev wrote: > > > > On 27-Jul-2020, at 10:46 PM, Athira Rajeev <atrajeev@linux.vnet.ibm.com> wrote: > > > > Patch set to add support for perf extended register capability in > > powerpc. The capability flag PERF_PMU_CAP_EXTENDED_REGS, is used to > > indicate the PMU which support extended registers. The generic code > > define the mask of extended registers as 0 for non supported architectures. > > > > Patches 1 and 2 are the kernel side changes needed to include > > base support for extended regs in powerpc and in power10. > > Patches 3 and 4 are the perf tools side changes needed to support the > > extended registers. > > > > Hi Arnaldo, Jiri > > please let me know if you have any comments/suggestions on this patch series to add support for perf extended regs. hi, can't really tell for powerpc, but in general perf tool changes look ok jirka
> On 31-Jul-2020, at 1:20 AM, Jiri Olsa <jolsa@redhat.com> wrote: > > On Thu, Jul 30, 2020 at 01:24:40PM +0530, Athira Rajeev wrote: >> >> >>> On 27-Jul-2020, at 10:46 PM, Athira Rajeev <atrajeev@linux.vnet.ibm.com> wrote: >>> >>> Patch set to add support for perf extended register capability in >>> powerpc. The capability flag PERF_PMU_CAP_EXTENDED_REGS, is used to >>> indicate the PMU which support extended registers. The generic code >>> define the mask of extended registers as 0 for non supported architectures. >>> >>> Patches 1 and 2 are the kernel side changes needed to include >>> base support for extended regs in powerpc and in power10. >>> Patches 3 and 4 are the perf tools side changes needed to support the >>> extended registers. >>> >> >> Hi Arnaldo, Jiri >> >> please let me know if you have any comments/suggestions on this patch series to add support for perf extended regs. > > hi, > can't really tell for powerpc, but in general > perf tool changes look ok > Hi Jiri, Thanks for checking the patchset. Athira. > jirka
Em Fri, Jul 31, 2020 at 11:04:14PM +0530, Athira Rajeev escreveu: > > > > On 31-Jul-2020, at 1:20 AM, Jiri Olsa <jolsa@redhat.com> wrote: > > > > On Thu, Jul 30, 2020 at 01:24:40PM +0530, Athira Rajeev wrote: > >> > >> > >>> On 27-Jul-2020, at 10:46 PM, Athira Rajeev <atrajeev@linux.vnet.ibm.com> wrote: > >>> > >>> Patch set to add support for perf extended register capability in > >>> powerpc. The capability flag PERF_PMU_CAP_EXTENDED_REGS, is used to > >>> indicate the PMU which support extended registers. The generic code > >>> define the mask of extended registers as 0 for non supported architectures. > >>> > >>> Patches 1 and 2 are the kernel side changes needed to include > >>> base support for extended regs in powerpc and in power10. > >>> Patches 3 and 4 are the perf tools side changes needed to support the > >>> extended registers. > >>> > >> > >> Hi Arnaldo, Jiri > >> > >> please let me know if you have any comments/suggestions on this patch series to add support for perf extended regs. > > > > hi, > > can't really tell for powerpc, but in general > > perf tool changes look ok > > > > Hi Jiri, > Thanks for checking the patchset. So I'dd say you submit a v6, split into the kernel part, that probably should go via the PPC arch tree, and I can pick the tooling part, ok? - Arnaldo
> On 06-Aug-2020, at 5:50 PM, Arnaldo Carvalho de Melo <acme@kernel.org> wrote: > > Em Fri, Jul 31, 2020 at 11:04:14PM +0530, Athira Rajeev escreveu: >> >> >>> On 31-Jul-2020, at 1:20 AM, Jiri Olsa <jolsa@redhat.com> wrote: >>> >>> On Thu, Jul 30, 2020 at 01:24:40PM +0530, Athira Rajeev wrote: >>>> >>>> >>>>> On 27-Jul-2020, at 10:46 PM, Athira Rajeev <atrajeev@linux.vnet.ibm.com> wrote: >>>>> >>>>> Patch set to add support for perf extended register capability in >>>>> powerpc. The capability flag PERF_PMU_CAP_EXTENDED_REGS, is used to >>>>> indicate the PMU which support extended registers. The generic code >>>>> define the mask of extended registers as 0 for non supported architectures. >>>>> >>>>> Patches 1 and 2 are the kernel side changes needed to include >>>>> base support for extended regs in powerpc and in power10. >>>>> Patches 3 and 4 are the perf tools side changes needed to support the >>>>> extended registers. >>>>> >>>> >>>> Hi Arnaldo, Jiri >>>> >>>> please let me know if you have any comments/suggestions on this patch series to add support for perf extended regs. >>> >>> hi, >>> can't really tell for powerpc, but in general >>> perf tool changes look ok >>> >> >> Hi Jiri, >> Thanks for checking the patchset. > > So I'dd say you submit a v6, split into the kernel part, that probably > should go via the PPC arch tree, and I can pick the tooling part, ok? > > - Arnaldo Sure Arnaldo, I will send a v6. Thanks, Athira