@@ -123,10 +123,19 @@ static u32 update_clock_tree_delay(struct tegra210_emc *emc, int type)
bool dvfs_update = type == DVFS_UPDATE;
s32 tdel = 0, tmdel = 0, adel = 0;
bool dvfs_pt1 = type == DVFS_PT1;
+ u32 temp[2][2], value, delay_us;
unsigned long cval = 0;
- u32 temp[2][2], value;
unsigned int i;
+ if (dvfs_pt1 || periodic_training_update) {
+ delay_us = tegra210_emc_actual_osc_clocks(last->run_clocks);
+ delay_us *= 1000;
+ delay_us = 2 + (delay_us / last->rate);
+
+ tegra210_emc_start_periodic_compensation(emc);
+ udelay(delay_us);
+ }
+
/*
* Dev0 MSB.
*/
@@ -409,11 +418,6 @@ static u32 periodic_compensation_handler(struct tegra210_emc *emc, u32 type,
(nt)->ptfv_list[PTFV_DVFS_SAMPLES_INDEX]; })
u32 i, adel = 0, samples = next->ptfv_list[PTFV_DVFS_SAMPLES_INDEX];
- u32 delay;
-
- delay = tegra210_emc_actual_osc_clocks(last->run_clocks);
- delay *= 1000;
- delay = 2 + (delay / last->rate);
if (!next->periodic_training)
return 0;
@@ -447,9 +451,6 @@ static u32 periodic_compensation_handler(struct tegra210_emc *emc, u32 type,
__MOVAVG(next, C1D1U1) = 0;
for (i = 0; i < samples; i++) {
- tegra210_emc_start_periodic_compensation(emc);
- udelay(delay);
-
/*
* Generate next sample of data.
*/
@@ -465,12 +466,8 @@ static u32 periodic_compensation_handler(struct tegra210_emc *emc, u32 type,
adel = update_clock_tree_delay(emc, DVFS_UPDATE);
}
- if (type == PERIODIC_TRAINING_SEQUENCE) {
- tegra210_emc_start_periodic_compensation(emc);
- udelay(delay);
-
+ if (type == PERIODIC_TRAINING_SEQUENCE)
adel = update_clock_tree_delay(emc, PERIODIC_TRAINING_UPDATE);
- }
return adel;
}
Move the calls that instruct the RAM to capture its clock tree delays to update_clock_tree_delay() in order to avoid code duplication. Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt> --- drivers/memory/tegra/tegra210-emc-cc-r21021.c | 25 +++++++++++-------------- 1 file changed, 11 insertions(+), 14 deletions(-)