Message ID | 20241112072704.767569-1-jpatel2@marvell.com |
---|---|
State | New |
Headers | show |
Series | [1/1] dt-bindings: pci: change reset to reset controller phandle | expand |
On Tue, Nov 12, 2024 at 1:27 AM Jenishkumar Maheshbhai Patel <jpatel2@marvell.com> wrote: > > replace reset bit mask and system controller > with reset controller and reset bit phandle The diff tells us "what" already. The commit msg needs to answer "why". The DT is an ABI. You can't just replace property(ies) with a new property. There's exceptions if there are no platforms in use or similar. This binding needs to be converted to dtschema before adding to it. > > Signed-off-by: Jenishkumar Maheshbhai Patel <jpatel2@marvell.com> > --- > Documentation/devicetree/bindings/pci/pci-armada8k.txt | 10 ++++------ > 1 file changed, 4 insertions(+), 6 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/pci-armada8k.txt b/Documentation/devicetree/bindings/pci/pci-armada8k.txt > index a177b971a9a0..a9a71d77b261 100644 > --- a/Documentation/devicetree/bindings/pci/pci-armada8k.txt > +++ b/Documentation/devicetree/bindings/pci/pci-armada8k.txt > @@ -24,10 +24,9 @@ Optional properties: > - phy-names: names of the PHYs corresponding to the number of lanes. > Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for > 2 PHYs. > -- marvell,system-controller: address of system controller needed > - in order to reset MAC used by link-down handle > -- marvell,mac-reset-bit-mask: MAC reset bit of system controller > - needed in order to reset MAC used by link-down handle > +- resets: phandle reset controller with int reset controller bit. > + needed in order to reset MAC used by link-down handle. > + > > Example: > > @@ -49,6 +48,5 @@ Example: > interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > num-lanes = <1>; > clocks = <&cpm_syscon0 1 13>; > - marvell,system-controller = <&CP11X_LABEL(syscon0)>; > - marvell,mac-reset-bit-mask = <CP11X_PCIEx_MAC_RESET_BIT_MASK(1)>; > + resets = <&CP11X_LABEL(pcie_mac_reset) CP11X_PCIEx_MAC_RESET_BIT(0)>; > }; > -- > 2.25.1 >
diff --git a/Documentation/devicetree/bindings/pci/pci-armada8k.txt b/Documentation/devicetree/bindings/pci/pci-armada8k.txt index a177b971a9a0..a9a71d77b261 100644 --- a/Documentation/devicetree/bindings/pci/pci-armada8k.txt +++ b/Documentation/devicetree/bindings/pci/pci-armada8k.txt @@ -24,10 +24,9 @@ Optional properties: - phy-names: names of the PHYs corresponding to the number of lanes. Must be "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy" for 2 PHYs. -- marvell,system-controller: address of system controller needed - in order to reset MAC used by link-down handle -- marvell,mac-reset-bit-mask: MAC reset bit of system controller - needed in order to reset MAC used by link-down handle +- resets: phandle reset controller with int reset controller bit. + needed in order to reset MAC used by link-down handle. + Example: @@ -49,6 +48,5 @@ Example: interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; num-lanes = <1>; clocks = <&cpm_syscon0 1 13>; - marvell,system-controller = <&CP11X_LABEL(syscon0)>; - marvell,mac-reset-bit-mask = <CP11X_PCIEx_MAC_RESET_BIT_MASK(1)>; + resets = <&CP11X_LABEL(pcie_mac_reset) CP11X_PCIEx_MAC_RESET_BIT(0)>; };
replace reset bit mask and system controller with reset controller and reset bit phandle Signed-off-by: Jenishkumar Maheshbhai Patel <jpatel2@marvell.com> --- Documentation/devicetree/bindings/pci/pci-armada8k.txt | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-)