diff mbox series

[v4] dt-bindings: mtd: cadence: convert cadence-nand-controller.txt to yaml

Message ID 20241205053350.434370-1-niravkumar.l.rabara@intel.com
State New
Headers show
Series [v4] dt-bindings: mtd: cadence: convert cadence-nand-controller.txt to yaml | expand

Commit Message

Rabara, Niravkumar L Dec. 5, 2024, 5:33 a.m. UTC
From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>

Convert cadence-nand-controller.txt to yaml format.
Update cadence-nand-controller.txt to cdns,hp-nfc.yaml in MAINTAINER file.

Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
---

Changes in v4:
- Fixed the identation for examples as per review comment in v3.

Changes in v3:
- Changed file name to cdns,hp-nfc.yaml to match with compatible.
- Update description, fixed alignment, and used defines for interrupt
  flag as per review comments in v2.

Changes in v2:
- Update name cadence-nand-controller.txt to cadence,nand.yaml in MAINTAINER
  file to resolve the warning.

 .../bindings/mtd/cadence-nand-controller.txt  | 53 -------------
 .../devicetree/bindings/mtd/cdns,hp-nfc.yaml  | 75 +++++++++++++++++++
 MAINTAINERS                                   |  2 +-
 3 files changed, 76 insertions(+), 54 deletions(-)
 delete mode 100644 Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt
 create mode 100644 Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml

Comments

Krzysztof Kozlowski Dec. 5, 2024, 9:18 a.m. UTC | #1
On Thu, Dec 05, 2024 at 01:33:50PM +0800, niravkumar.l.rabara@intel.com wrote:
> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> 
> Convert cadence-nand-controller.txt to yaml format.
> Update cadence-nand-controller.txt to cdns,hp-nfc.yaml in MAINTAINER file.
> 
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> ---
> 
> Changes in v4:
> - Fixed the identation for examples as per review comment in v3.
> 

<form letter>
This is a friendly reminder during the review process.

It looks like you received a tag and forgot to add it.

If you do not know the process, here is a short explanation: Please add
Acked-by/Reviewed-by/Tested-by tags when posting new versions, under
or above your Signed-off-by tag. Tag is "received", when provided
in a message replied to you on the mailing list. Tools like b4 can help
here. However, there's no need to repost patches *only* to add the tags.
The upstream maintainer will do that for tags received on the version
they apply.

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If a tag was not added on purpose, please state why and what changed.
</form letter>

Best regards,
Krzysztof
Miquel Raynal Dec. 5, 2024, 10:22 a.m. UTC | #2
On 05/12/2024 at 13:33:50 +08, niravkumar.l.rabara@intel.com wrote:

> From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>
> Convert cadence-nand-controller.txt to yaml format.
> Update cadence-nand-controller.txt to cdns,hp-nfc.yaml in MAINTAINER file.
>
> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>

Looks good to me, but I'll wait for binding maintainers ack ofc.

Thanks,
Miquèl
Krzysztof Kozlowski Dec. 8, 2024, 2:26 p.m. UTC | #3
On Thu, Dec 05, 2024 at 11:22:09AM +0100, Miquel Raynal wrote:
> On 05/12/2024 at 13:33:50 +08, niravkumar.l.rabara@intel.com wrote:
> 
> > From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> >
> > Convert cadence-nand-controller.txt to yaml format.
> > Update cadence-nand-controller.txt to cdns,hp-nfc.yaml in MAINTAINER file.
> >
> > Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> 
> Looks good to me, but I'll wait for binding maintainers ack ofc.

There was one, but author ignored it.

Best regards,
Krzysztof
Rabara, Niravkumar L Dec. 9, 2024, 1:36 a.m. UTC | #4
> -----Original Message-----
> From: Krzysztof Kozlowski <krzk@kernel.org>
> Sent: Sunday, 8 December, 2024 10:26 PM
> To: Miquel Raynal <miquel.raynal@bootlin.com>
> Cc: Rabara, Niravkumar L <niravkumar.l.rabara@intel.com>;
> devicetree@vger.kernel.org; Richard Weinberger <richard@nod.at>; Vignesh
> Raghavendra <vigneshr@ti.com>; Rob Herring <robh@kernel.org>; Krzysztof
> Kozlowski <krzk+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>; linux-
> mtd@lists.infradead.org; linux-kernel@vger.kernel.org
> Subject: Re: [PATCH v4] dt-bindings: mtd: cadence: convert cadence-nand-
> controller.txt to yaml
> 
> On Thu, Dec 05, 2024 at 11:22:09AM +0100, Miquel Raynal wrote:
> > On 05/12/2024 at 13:33:50 +08, niravkumar.l.rabara@intel.com wrote:
> >
> > > From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> > >
> > > Convert cadence-nand-controller.txt to yaml format.
> > > Update cadence-nand-controller.txt to cdns,hp-nfc.yaml in MAINTAINER
> file.
> > >
> > > Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
> >
> > Looks good to me, but I'll wait for binding maintainers ack ofc.
> 
> There was one, but author ignored it.
> 
> Best regards,
> Krzysztof

My apologies, I forgot to include the 'Reviewed-by: Conor Dooley conor.dooley@microchip.com' tag that I received in the v3 patch. I will ensure this does not happen again.

Thanks,
Nirav
Miquel Raynal Dec. 9, 2024, 7:35 a.m. UTC | #5
On 09/12/2024 at 01:36:57 GMT, "Rabara, Niravkumar L" <niravkumar.l.rabara@intel.com> wrote:

>> -----Original Message-----
>> From: Krzysztof Kozlowski <krzk@kernel.org>
>> Sent: Sunday, 8 December, 2024 10:26 PM
>> To: Miquel Raynal <miquel.raynal@bootlin.com>
>> Cc: Rabara, Niravkumar L <niravkumar.l.rabara@intel.com>;
>> devicetree@vger.kernel.org; Richard Weinberger <richard@nod.at>; Vignesh
>> Raghavendra <vigneshr@ti.com>; Rob Herring <robh@kernel.org>; Krzysztof
>> Kozlowski <krzk+dt@kernel.org>; Conor Dooley <conor+dt@kernel.org>; linux-
>> mtd@lists.infradead.org; linux-kernel@vger.kernel.org
>> Subject: Re: [PATCH v4] dt-bindings: mtd: cadence: convert cadence-nand-
>> controller.txt to yaml
>> 
>> On Thu, Dec 05, 2024 at 11:22:09AM +0100, Miquel Raynal wrote:
>> > On 05/12/2024 at 13:33:50 +08, niravkumar.l.rabara@intel.com wrote:
>> >
>> > > From: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>> > >
>> > > Convert cadence-nand-controller.txt to yaml format.
>> > > Update cadence-nand-controller.txt to cdns,hp-nfc.yaml in MAINTAINER
>> file.
>> > >
>> > > Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
>> >
>> > Looks good to me, but I'll wait for binding maintainers ack ofc.
>> 
>> There was one, but author ignored it.
>> 
>> Best regards,
>> Krzysztof
>
> My apologies, I forgot to include the 'Reviewed-by: Conor Dooley
> conor.dooley@microchip.com' tag that I received in the v3 patch. I will
> ensure this does not happen again.

Please re-send with the missing tag(s), otherwise they will not be
picked-up (automatically).

Cheers,
Miquèl
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt b/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt
deleted file mode 100644
index d2eada5044b2..000000000000
--- a/Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt
+++ /dev/null
@@ -1,53 +0,0 @@ 
-* Cadence NAND controller
-
-Required properties:
-  - compatible : "cdns,hp-nfc"
-  - reg : Contains two entries, each of which is a tuple consisting of a
-	  physical address and length. The first entry is the address and
-	  length of the controller register set. The second entry is the
-	  address and length of the Slave DMA data port.
-  - reg-names: should contain "reg" and "sdma"
-  - #address-cells: should be 1. The cell encodes the chip select connection.
-  - #size-cells : should be 0.
-  - interrupts : The interrupt number.
-  - clocks: phandle of the controller core clock (nf_clk).
-
-Optional properties:
-  - dmas: shall reference DMA channel associated to the NAND controller
-  - cdns,board-delay-ps : Estimated Board delay. The value includes the total
-    round trip delay for the signals and is used for deciding on values
-    associated with data read capture. The example formula for SDR mode is
-    the following:
-    board delay = RE#PAD delay + PCB trace to device + PCB trace from device
-    + DQ PAD delay
-
-Child nodes represent the available NAND chips.
-
-Required properties of NAND chips:
-  - reg: shall contain the native Chip Select ids from 0 to max supported by
-    the cadence nand flash controller
-
-See Documentation/devicetree/bindings/mtd/nand-controller.yaml for more details on
-generic bindings.
-
-Example:
-
-nand_controller: nand-controller@60000000 {
-	  compatible = "cdns,hp-nfc";
-	  #address-cells = <1>;
-	  #size-cells = <0>;
-	  reg = <0x60000000 0x10000>, <0x80000000 0x10000>;
-	  reg-names = "reg", "sdma";
-	  clocks = <&nf_clk>;
-	  cdns,board-delay-ps = <4830>;
-	  interrupts = <2 0>;
-	  nand@0 {
-	      reg = <0>;
-	      label = "nand-1";
-	  };
-	  nand@1 {
-	      reg = <1>;
-	      label = "nand-2";
-	  };
-
-};
diff --git a/Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml b/Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml
new file mode 100644
index 000000000000..0bed37a994c3
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml
@@ -0,0 +1,75 @@ 
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mtd/cdns,hp-nfc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cadence NAND controller
+
+maintainers:
+  - Niravkumar L Rabara <niravkumar.l.rabara@intel.com>
+
+allOf:
+  - $ref: nand-controller.yaml
+
+properties:
+  compatible:
+    items:
+      - const: cdns,hp-nfc
+
+  reg:
+    items:
+      - description: Controller register set
+      - description: Slave DMA data port register set
+
+  reg-names:
+    items:
+      - const: reg
+      - const: sdma
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  dmas:
+    maxItems: 1
+
+  cdns,board-delay-ps:
+    description: |
+      Estimated Board delay. The value includes the total round trip
+      delay for the signals and is used for deciding on values associated
+      with data read capture. The example formula for SDR mode is the
+      following.
+      board delay = RE#PAD delay + PCB trace to device + PCB trace from device
+      + DQ PAD delay
+
+required:
+  - compatible
+  - reg
+  - reg-names
+  - interrupts
+  - clocks
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    nand-controller@10b80000 {
+        compatible = "cdns,hp-nfc";
+        reg = <0x10b80000 0x10000>,
+              <0x10840000 0x10000>;
+        reg-names = "reg", "sdma";
+        #address-cells = <1>;
+        #size-cells = <0>;
+        interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
+        clocks = <&nf_clk>;
+        cdns,board-delay-ps = <4830>;
+
+        nand@0 {
+            reg = <0>;
+        };
+    };
diff --git a/MAINTAINERS b/MAINTAINERS
index 1e930c7a58b1..9fab4b4a75a1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5009,7 +5009,7 @@  F:	drivers/media/platform/cadence/cdns-csi2*
 CADENCE NAND DRIVER
 L:	linux-mtd@lists.infradead.org
 S:	Orphan
-F:	Documentation/devicetree/bindings/mtd/cadence-nand-controller.txt
+F:	Documentation/devicetree/bindings/mtd/cdns,hp-nfc.yaml
 F:	drivers/mtd/nand/raw/cadence-nand-controller.c
 
 CADENCE USB3 DRD IP DRIVER