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Tue, 1 Oct 2024 08:30:39 +0000 From: Michael Wu To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jarkko Nikula , Andy Shevchenko , Mika Westerberg , Jan Dabros , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Morgan Chang , mvp.kutali@gmail.com, Michael Wu Subject: [PATCH v3 1/2] dt-bindings: i2c: snps,designware-i2c: declare bus capacitance and clk freq optimized Date: Tue, 1 Oct 2024 16:29:33 +0800 Message-ID: <20241001082937.680372-2-michael.wu@kneron.us> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20241001082937.680372-1-michael.wu@kneron.us> References: <20241001082937.680372-1-michael.wu@kneron.us> X-ClientProxiedBy: TPYP295CA0022.TWNP295.PROD.OUTLOOK.COM (2603:1096:7d0:a::18) To IA1PR14MB6224.namprd14.prod.outlook.com (2603:10b6:208:42b::6) Precedence: bulk X-Mailing-List: linux-i2c@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: IA1PR14MB6224:EE_|SA3PR14MB6462:EE_ X-MS-Office365-Filtering-Correlation-Id: 96f567e2-9278-4537-0a93-08dce1f35442 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|52116014|7416014|376014|1800799024|80162021|921020|38350700014; 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It affects the high and low pulse width of SCL line in high speed mode. The legal values for this property are 100 and 400 only, and default value is 100. This property corresponds to IC_CAP_LOADING. snps,clk-freq-optimized indicates whether the hardware input clock frequency is reduced by reducing the internal latency. This property corresponds to IC_CLK_FREQ_OPTIMIZATION. The driver can calculate hs_hcnt and hs_lcnt appropriate for the hardware based on these two properties. Signed-off-by: Michael Wu --- .../bindings/i2c/snps,designware-i2c.yaml | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml index 60035a787e5c..c373f3acd34b 100644 --- a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml @@ -97,6 +97,21 @@ properties: - const: tx - const: rx + snps,bus-capacitance-pf: + $ref: /schemas/types.yaml#/definitions/uint32 + description: > + This property indicates the bus capacitance in picofarads (pF). + This value is used to compute the tHIGH and tLOW periods for high speed + mode. + default: 100 + + snps,clk-freq-optimized: + description: > + This property indicates whether the hardware input clock frequency is + reduced by reducing the internal latency. This value is used to compute + the tHIGH and tLOW periods for high speed mode. + type: boolean + unevaluatedProperties: false required: @@ -146,4 +161,13 @@ examples: interrupts = <8>; clocks = <&ahb_clk>; }; + - | + i2c@c5000000 { + compatible = "snps,designware-i2c"; + reg = <0xc5000000 0x1000>; + interrupts = <37 1>; + clock-frequency = <400000>; + snps,bus-capacitance-pf = <400>; + snps,clk-freq-optimized; + }; ...