From patchwork Tue Sep 23 22:58:45 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gernot Vormayr X-Patchwork-Id: 392693 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id BD96B1400B2 for ; Wed, 24 Sep 2014 08:58:56 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932242AbaIWW6z (ORCPT ); Tue, 23 Sep 2014 18:58:55 -0400 Received: from mail-we0-f177.google.com ([74.125.82.177]:58404 "EHLO mail-we0-f177.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932233AbaIWW6z (ORCPT ); Tue, 23 Sep 2014 18:58:55 -0400 Received: by mail-we0-f177.google.com with SMTP id t60so5270205wes.22 for ; Tue, 23 Sep 2014 15:58:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xNplQ+xXzI+5VJA7LaHX9Sa+dEJKq0c2Kcbrhm4XOd4=; b=icDInFhPV58BYL2nOsVAUofft5ss1KK/46/l4lXSDIPjgOWWRaTlOtOqeOMnqoNuwf 04ShrHF7LZpLH3JABmlkY3M8RaObNlH/Nqm3j3s4kNNWwcpLeuc4Wj4X6QhH7ztIme26 DGy7D7mHl3VrbrBo8RKsn788Uv1tqoWBI+L3amuTp/J2HjuMAy7fQswS+RcQVRMgxxDl ZAmsG+VmpuV5sNGs8h/jdmtNb1cv3d/A9GlGanUGvlHeA41N7+nN5B2iD7DNXee/Jqkg pCyc1gvLFnIJ6VZvqZ+hzVhA7zFoMlcLOQax9cULhHA6Hplvq2AgG+6pZL+wZBcAIFLo n8lQ== X-Received: by 10.180.38.7 with SMTP id c7mr26236665wik.65.1411513133491; Tue, 23 Sep 2014 15:58:53 -0700 (PDT) Received: from notti-air.lan (chello084112188107.11.vie.surfer.at. [84.112.188.107]) by mx.google.com with ESMTPSA id pk9sm17450030wjb.16.2014.09.23.15.58.52 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 23 Sep 2014 15:58:52 -0700 (PDT) From: Gernot Vormayr To: Linus Walleij , Alexandre Courbot , Michal Simek , linux-gpio@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Gernot Vormayr Subject: [PATCH v2 1/1] gpio: Fix ngpio in gpio-xilinx driver Date: Wed, 24 Sep 2014 00:58:45 +0200 Message-Id: <1411513125-20712-1-git-send-email-gvormayr@gmail.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1411031032-20649-1-git-send-email-gvormayr@gmail.com> References: <1411031032-20649-1-git-send-email-gvormayr@gmail.com> Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org If one adds gpio-controller; to the chip in the devicetree, then initialization fails with 'gpiochip_find_base: cannot find free range', because ngpio is 0. This patch fixes the bug. This version includes the suggestions from Linus Walleij. Tested on ml507 board. Signed-off-by: Gernot Vormayr --- drivers/gpio/gpio-xilinx.c | 23 +++++++++++------------ 1 file changed, 11 insertions(+), 12 deletions(-) diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c index 1248186..c11bc11 100644 --- a/drivers/gpio/gpio-xilinx.c +++ b/drivers/gpio/gpio-xilinx.c @@ -197,6 +197,7 @@ static int xgpio_of_probe(struct device_node *np) struct xgpio_instance *chip; int status = 0; const u32 *tree_info; + u32 ngpio; chip = kzalloc(sizeof(*chip), GFP_KERNEL); if (!chip) @@ -211,12 +212,11 @@ static int xgpio_of_probe(struct device_node *np) /* Update GPIO direction shadow register with default value */ of_property_read_u32(np, "xlnx,tri-default", &chip->gpio_dir); - /* By default assume full GPIO controller */ - chip->mmchip.gc.ngpio = 32; - - /* Check device node and parent device node for device width */ - of_property_read_u32(np, "xlnx,gpio-width", - (u32 *)&chip->mmchip.gc.ngpio); + /* Check device node and parent device node for device width + and assume default width of 32 */ + if (of_property_read_u32(np, "xlnx,gpio-width", &ngpio)) + ngpio = 32; + chip->mmchip.gc.ngpio = (u16)ngpio; spin_lock_init(&chip->gpio_lock); @@ -258,12 +258,11 @@ static int xgpio_of_probe(struct device_node *np) /* Update GPIO direction shadow register with default value */ of_property_read_u32(np, "xlnx,tri-default-2", &chip->gpio_dir); - /* By default assume full GPIO controller */ - chip->mmchip.gc.ngpio = 32; - - /* Check device node and parent device node for device width */ - of_property_read_u32(np, "xlnx,gpio2-width", - (u32 *)&chip->mmchip.gc.ngpio); + /* Check device node and parent device node for device width + and assume default width of 32 */ + if (of_property_read_u32(np, "xlnx,gpio2-width", &ngpio)) + ngpio = 32; + chip->mmchip.gc.ngpio = (u16)ngpio; spin_lock_init(&chip->gpio_lock);