From patchwork Mon Sep 8 11:47:59 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 386897 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id F050B14017B for ; Mon, 8 Sep 2014 21:48:36 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753604AbaIHLsg (ORCPT ); Mon, 8 Sep 2014 07:48:36 -0400 Received: from mga09.intel.com ([134.134.136.24]:54092 "EHLO mga09.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753376AbaIHLsg (ORCPT ); Mon, 8 Sep 2014 07:48:36 -0400 Received: from orsmga002.jf.intel.com ([10.7.209.21]) by orsmga102.jf.intel.com with ESMTP; 08 Sep 2014 04:42:29 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.04,486,1406617200"; d="scan'208";a="599620220" Received: from blue.fi.intel.com ([10.237.72.156]) by orsmga002.jf.intel.com with ESMTP; 08 Sep 2014 04:48:31 -0700 Received: by blue.fi.intel.com (Postfix, from userid 1004) id C1112E00A3; Mon, 8 Sep 2014 14:48:00 +0300 (EEST) From: Mika Westerberg To: Linus Walleij , Alexandre Courbot Cc: Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , x86@kernel.org, Ning Li , Alan Cox , Mika Westerberg , Mark Brown , linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org Subject: [PATCH 1/2] x86, gpio: Increase ARCH_NR_GPIOs to 512 Date: Mon, 8 Sep 2014 14:47:59 +0300 Message-Id: <1410176880-22524-1-git-send-email-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.1.0 Sender: linux-gpio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Some newer Intel SoCs like Braswell already have more than 256 GPIOs available so the default limit is exceeded. In order to support these add back the custom GPIO header with limit of 512 GPIOs for x86. Signed-off-by: Mika Westerberg --- arch/x86/Kconfig | 1 + arch/x86/include/asm/gpio.h | 54 +++++++++++++++++++++++++++++++++++++++++---- 2 files changed, 51 insertions(+), 4 deletions(-) diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 778178f4c7d1..0bf6fe76e7ba 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -136,6 +136,7 @@ config X86 select HAVE_ACPI_APEI if ACPI select HAVE_ACPI_APEI_NMI if ACPI select ACPI_LEGACY_TABLES_LOOKUP if ACPI + select ARCH_HAVE_CUSTOM_GPIO_H config INSTRUCTION_DECODER def_bool y diff --git a/arch/x86/include/asm/gpio.h b/arch/x86/include/asm/gpio.h index b3799d88ffcf..152b71788f2d 100644 --- a/arch/x86/include/asm/gpio.h +++ b/arch/x86/include/asm/gpio.h @@ -1,4 +1,50 @@ -#ifndef __LINUX_GPIO_H -#warning Include linux/gpio.h instead of asm/gpio.h -#include -#endif +/* + * GPIO customization for x86. + * + * Based on the original code: + * + * Copyright (c) 2007-2008 MontaVista Software, Inc. + * Author: Anton Vorontsov + * + * Copyright (c) 2014, Intel Corporation. + * Author: Mika Westerberg + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#ifndef __ASM_X86_GPIO_H +#define __ASM_X86_GPIO_H + +#define ARCH_NR_GPIOS 512 +#include + +#ifdef CONFIG_GPIOLIB +static inline int gpio_get_value(unsigned int gpio) +{ + return __gpio_get_value(gpio); +} + +static inline void gpio_set_value(unsigned int gpio, int value) +{ + __gpio_set_value(gpio, value); +} + +static inline int gpio_cansleep(unsigned int gpio) +{ + return __gpio_cansleep(gpio); +} + +static inline int gpio_to_irq(unsigned int gpio) +{ + return __gpio_to_irq(gpio); +} + +static inline int irq_to_gpio(unsigned int irq) +{ + return -EINVAL; +} +#endif /* CONFIG_GPIOLIB */ + +#endif /* __ASM_X86_GPIO_H */