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[0/7] pinctrl: sunxi: Add Allwinner A523 support

Message ID 20241111005750.13071-1-andre.przywara@arm.com
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Series pinctrl: sunxi: Add Allwinner A523 support | expand

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Andre Przywara Nov. 11, 2024, 12:57 a.m. UTC 
Hi,

this series introduces pinctrl support for the Allwinner A523 family
of SoCs (comprising A523, A527, T527). [1]
The first three patches extend the sunxi pinctrl core code to deal with
some specialities of the new SoC: it uses every of the 11 possible banks
except the first one, which required some register remapping. The first
patch here is actually some cleanup, which we should take regardless, I
think, since it fixes some hack we introduced with the D1 support.

The main feature is actually patch 4, which introduces a new way to
express the required pinmux values for each function/pin pair. 
Traditionally, we dumped a rather large table of data into the (single
image!) kernel for that, but this approach now puts that value into
the DT, and builds the table at runtime. This patch was posted twice
before [1][2], the last time LinusW seemed to be fine with the idea,
just complained about the abuse of the generic pinmux property. I changed
that to allwinner,pinmux now. For yet another alternative, see below.

The rest of the patches are the usual suspects: the two files for the
two pinctrl instances of the new SoC (now very small), and the DT
binding.

Based on v6.12-rc1. Please have a look, review and test!

Cheers,
Andre

[1] https://linux-sunxi.org/A523#Family_of_sun55iw3
[2] https://patchwork.ozlabs.org/project/linux-gpio/cover/20171113012523.2328-1-andre.przywara@arm.com/
[3] https://lore.kernel.org/linux-arm-kernel/20221110014255.20711-1-andre.przywara@arm.com/

P.S. LinusW's comment about "pinmux" being something different made me
think about whether we should adopt an even different approach, and
follow the Apple silicon GPIO driver. That conflates the existing "pins"
and "allwinner,pinmux" properties into the standard "pinmux" one, like
this:
	uart0_pb_pins: uart0-pb-pins {
		pinmux = <SUNXI_PIN(PB, 9, 2)>,
			 <SUNXI_PIN(PB, 10, 2)>;
		function = "uart0";
	};
That looks like a neat solution to me, with the huge drawback of
requiring a completely different of_xlate function, which I guess means
a more or less completely separate pinctrl driver.
Let me know if you think that's worthwhile.

Andre Przywara (7):
  pinctrl: sunxi: refactor pinctrl variants into flags
  pinctrl: sunxi: move bank K register offset
  pinctrl: sunxi: support moved power configuration registers
  pinctrl: sunxi: allow reading mux values from DT
  dt-bindings: pinctrl: add compatible for Allwinner A523/T527
  pinctrl: sunxi: Add support for the Allwinner A523
  pinctrl: sunxi: Add support for the secondary A523 GPIO ports

 .../pinctrl/allwinner,sun4i-a10-pinctrl.yaml  |  23 +-
 drivers/pinctrl/sunxi/Kconfig                 |  10 +
 drivers/pinctrl/sunxi/Makefile                |   3 +
 drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c     |   6 +-
 drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c     |   8 +-
 drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c |  54 +++
 drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c   |  54 +++
 drivers/pinctrl/sunxi/pinctrl-sun5i.c         |   8 +-
 drivers/pinctrl/sunxi/pinctrl-sun6i-a31.c     |   8 +-
 drivers/pinctrl/sunxi/pinctrl-sun8i-v3s.c     |   7 +-
 drivers/pinctrl/sunxi/pinctrl-sunxi-dt.c      | 357 ++++++++++++++++++
 drivers/pinctrl/sunxi/pinctrl-sunxi.c         |  54 ++-
 drivers/pinctrl/sunxi/pinctrl-sunxi.h         |  45 ++-
 13 files changed, 586 insertions(+), 51 deletions(-)
 create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c
 create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c
 create mode 100644 drivers/pinctrl/sunxi/pinctrl-sunxi-dt.c