| Message ID | 20170816221516.13609-3-alex.g@adaptrum.com |
|---|---|
| State | New |
| Headers | show |
Hi Alexandru, On Wed, 2017-08-16 at 15:15 -0700, Alexandru Gagniuc wrote: > This is split into the SOC bindings, and the board dts. The Endor > board is currently an FPGA emulation. Once real, silicon arrives, we > plan to remove Endor support. > > Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com> > --- > arch/arc/boot/dts/adaptrum_anarion.dtsi | 110 > ++++++++++++++++++++++++++++ > arch/arc/boot/dts/adaptrum_anarion_fpga.dts | 51 +++++++++++++ > 2 files changed, 161 insertions(+) > create mode 100644 arch/arc/boot/dts/adaptrum_anarion.dtsi > create mode 100644 arch/arc/boot/dts/adaptrum_anarion_fpga.dts > > diff --git a/arch/arc/boot/dts/adaptrum_anarion.dtsi > b/arch/arc/boot/dts/adaptrum_anarion.dtsi > new file mode 100644 > index 0000000..e177a24 > --- /dev/null > +++ b/arch/arc/boot/dts/adaptrum_anarion.dtsi > @@ -0,0 +1,110 @@ > +/* > + * Skeleton for Adaptrum Anarion SOC > + * > + * (C) Copyright 2017 Adaptrum, Inc. > + * Written by Alexandru Gagniuc <alex.g@adaptrum.com> for Adaptrum, > Inc. > + * Licensed under the GPLv2 or (at your option) any later version > + */ > + > +/* This skeleton is based on the ARC700 CPU */ > +#include "skeleton.dtsi" Perhaps it is better not to use skeleton.dtsi as we are planning to get rid of it. -- Eugeniy Paltsev
On Thu, 2017-08-17 at 11:11 +0000, Eugeniy Paltsev wrote: > Hi Alexandru, > > On Wed, 2017-08-16 at 15:15 -0700, Alexandru Gagniuc wrote: > > This is split into the SOC bindings, and the board dts. The Endor > > board is currently an FPGA emulation. Once real, silicon arrives, > > we > > plan to remove Endor support. > > > > Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com> > > --- > > arch/arc/boot/dts/adaptrum_anarion.dtsi | 110 > > ++++++++++++++++++++++++++++ > > arch/arc/boot/dts/adaptrum_anarion_fpga.dts | 51 +++++++++++++ > > 2 files changed, 161 insertions(+) > > create mode 100644 arch/arc/boot/dts/adaptrum_anarion.dtsi > > create mode 100644 arch/arc/boot/dts/adaptrum_anarion_fpga.dts > > > > diff --git a/arch/arc/boot/dts/adaptrum_anarion.dtsi > > b/arch/arc/boot/dts/adaptrum_anarion.dtsi > > new file mode 100644 > > index 0000000..e177a24 > > --- /dev/null > > +++ b/arch/arc/boot/dts/adaptrum_anarion.dtsi > > @@ -0,0 +1,110 @@ > > +/* > > + * Skeleton for Adaptrum Anarion SOC > > + * > > + * (C) Copyright 2017 Adaptrum, Inc. > > + * Written by Alexandru Gagniuc <alex.g@adaptrum.com> for > > Adaptrum, > > Inc. > > + * Licensed under the GPLv2 or (at your option) any later version > > + */ > > + > > +/* This skeleton is based on the ARC700 CPU */ > > +#include "skeleton.dtsi" > Perhaps it is better not to use skeleton.dtsi as we are planning to get rid of it. --- Little more explanation: We faced with fact what we had to override almost all nodes defined in skeleton.dtsi (and other skeletons files like skeleton_hs_idu.dtsi) for our boards. Only the timers nodes are left not overridden. So there is no much sense in skeletons files using and that's why we are planning to get rid of it. > -- > Eugeniy Paltsev > _______________________________________________ > linux-snps-arc mailing list > linux-snps-arc@lists.infradead.org -- Eugeniy Paltsev
Hi Alexandru, On Wed, 2017-08-16 at 15:15 -0700, Alexandru Gagniuc wrote: > +#include "skeleton.dtsi" Eugeniy already commented on that - most probably you'll end up overriding most if not all entries from "skeleton.dtsi" so why bother with it at all? And I don't see any mention of your own memory node so I assume you rely on the one from our skeleton.dtsi? The first question is if it really matches your setup? I.e. 256 Mb mapped to 0x8000_0000. And even if that's the case what if we change this to something else later? IMHO having your own "memory" node makes some sens :) > + > + gmac0: ethernet@f2010000 { > + compatible = "adaptrum,anarion-gmac", "snps,dwmac"; > + reg = <0xf2010000 0x4000>; > + > + interrupt-parent = <&core_intc>; You already specified default INTC above, so you may just drop "interrupt-parent" property from this node. > + > + gmac1: ethernet@f2014000 { > + compatible = "adaptrum,anarion-gmac", "snps,dwmac"; > + reg = <0xf2014000 0x4000>, <0xf2018100 8>; > + > + interrupt-parent = <&core_intc>; Ditto. -Alexey
diff --git a/arch/arc/boot/dts/adaptrum_anarion.dtsi b/arch/arc/boot/dts/adaptrum_anarion.dtsi new file mode 100644 index 0000000..e177a24 --- /dev/null +++ b/arch/arc/boot/dts/adaptrum_anarion.dtsi @@ -0,0 +1,110 @@ +/* + * Skeleton for Adaptrum Anarion SOC + * + * (C) Copyright 2017 Adaptrum, Inc. + * Written by Alexandru Gagniuc <alex.g@adaptrum.com> for Adaptrum, Inc. + * Licensed under the GPLv2 or (at your option) any later version + */ + +/* This skeleton is based on the ARC700 CPU */ +#include "skeleton.dtsi" + +/ { + compatible = "adaptrum,anarion"; + #address-cells = <1>; + #size-cells = <1>; + + soc { + compatible = "simple-bus"; + device_type = "soc"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + interrupt-parent = <&core_intc>; + + core_intc: interrupt-controller { + compatible = "snps,arc700-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + + uart0: serial@f2202100 { + compatible = "ns16550"; + reg = <0xf2202100 0x20>; + interrupts = <8>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <192000000>; + status = "disabled"; + }; + + uart1: serial@f2202200 { + compatible = "ns16550"; + reg = <0xf2202200 0x20>; + interrupts = <8>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <192000000>; + status = "disabled"; + }; + + uart2: serial@f2202300 { + compatible = "ns16550"; + reg = <0xf2202300 0x20>; + interrupts = <8>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <192000000>; + status = "disabled"; + }; + + uart3: serial@f2202400 { + compatible = "ns16550"; + reg = <0xf2202400 0x20>; + interrupts = <8>; + reg-shift = <2>; + reg-io-width = <4>; + clock-frequency = <192000000>; + status = "disabled"; + }; + + qspi: qspi@f200f000 { + compatible = "adaptrum,anarion-qspi"; + reg = <0xf200f000 0x1000>, + <0x20000000 0x08000000>; + + interrupts = <10>; + status = "disabled"; + }; + + gmac0: ethernet@f2010000 { + compatible = "adaptrum,anarion-gmac", "snps,dwmac"; + reg = <0xf2010000 0x4000>; + + interrupt-parent = <&core_intc>; + interrupts = <20>; + interrupt-names = "macirq"; + + clocks = <&core_clk>; + clock-names = "stmmaceth"; + + snps,pbl = <32>; + status = "disabled"; + }; + + gmac1: ethernet@f2014000 { + compatible = "adaptrum,anarion-gmac", "snps,dwmac"; + reg = <0xf2014000 0x4000>, <0xf2018100 8>; + + interrupt-parent = <&core_intc>; + interrupts = <21>; + interrupt-names = "macirq"; + + clocks = <&core_clk>; + clock-names = "stmmaceth"; + + snps,pbl = <32>; + status = "disabled"; + }; + }; +}; diff --git a/arch/arc/boot/dts/adaptrum_anarion_fpga.dts b/arch/arc/boot/dts/adaptrum_anarion_fpga.dts new file mode 100644 index 0000000..6b2e22f --- /dev/null +++ b/arch/arc/boot/dts/adaptrum_anarion_fpga.dts @@ -0,0 +1,51 @@ +/* + * Adaptrum Endor -- Anarion based FPGA emulation platform + * + * (C) Copyright 2017 Adaptrum, Inc. + * Written by Alexandru Gagniuc <alex.g@adaptrum.com> for Adaptrum, Inc. + * Licensed under the GPLv2 or (at your option) any later version + */ + +/dts-v1/; + +#include "adaptrum_anarion.dtsi" + +/ { + model = "adaptrum,endor-fpga"; + compatible = "adaptrum,arc-anarion"; + + chosen { + bootargs = "earlycon console=ttyS0,115200n8"; + stdout-path = "serial0:115200n8"; + }; + + aliases { + serial0 = &uart0; + }; + + core_clk: core_clk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <24000000>; + }; +}; + +&uart0 { + status = "okay"; +}; + +&qspi { + status = "okay"; + flash0: w25q128fvn@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "winbond,w25q128", "jedec,spi-nor"; + spi-max-frequency = <70000000>; + m25p,fast-read; + }; +}; + +&gmac1 { + phy-mode = "rgmii"; + status = "okay"; +};
This is split into the SOC bindings, and the board dts. The Endor board is currently an FPGA emulation. Once real, silicon arrives, we plan to remove Endor support. Signed-off-by: Alexandru Gagniuc <alex.g@adaptrum.com> --- arch/arc/boot/dts/adaptrum_anarion.dtsi | 110 ++++++++++++++++++++++++++++ arch/arc/boot/dts/adaptrum_anarion_fpga.dts | 51 +++++++++++++ 2 files changed, 161 insertions(+) create mode 100644 arch/arc/boot/dts/adaptrum_anarion.dtsi create mode 100644 arch/arc/boot/dts/adaptrum_anarion_fpga.dts