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Sun, 29 Sep 2024 12:00:37 -0400 X-MC-Unique: eRS_JxH6Mxe4VHkImrBjUg-1 Received: from mx-prod-int-04.mail-002.prod.us-west-2.aws.redhat.com (unknown [10.30.177.40]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mx-prod-mc-02.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id 4F1CD195395E; Sun, 29 Sep 2024 16:00:36 +0000 (UTC) Received: from oldenburg.str.redhat.com (unknown [10.45.224.151]) by mx-prod-int-04.mail-002.prod.us-west-2.aws.redhat.com (Postfix) with ESMTPS id C4C751944B22; Sun, 29 Sep 2024 16:00:34 +0000 (UTC) From: Florian Weimer To: libc-alpha@sourceware.org Cc: Adhemerval Zanella , Wilco Dijkstra Subject: [PATCH v3 06/29] arm: Add In-Reply-To: Message-ID: References: X-From-Line: e297f66c0046821adf1598b6694d3ee87893e2b5 Mon Sep 17 00:00:00 2001 Date: Sun, 29 Sep 2024 18:00:31 +0200 User-Agent: Gnus/5.13 (Gnus v5.13) MIME-Version: 1.0 X-Scanned-By: MIMEDefang 3.0 on 10.30.177.40 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-Spam-Status: No, score=-10.8 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: libc-alpha@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Libc-alpha mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: libc-alpha-bounces~incoming=patchwork.ozlabs.org@sourceware.org While Linux only use HAVE_PAGE_SIZE_4KB in arch/arm/Kconfig, 32-bit Arm binaries can run on AArch64 kernels in compat mode, so they can observe the full range of page sizes that are possible on AArch64. The toolchain defaults do not reflect this, so xfail the future elf/tst-load-alignment test. Note: Alternatively, we could fix the page size at 4 KiB and tell people to use a 4 KiB kernel if running on AArch64. Maybe that's the right approach here? --- sysdeps/arm/bits/pagesize.h | 2 ++ sysdeps/unix/sysv/linux/arm/Makefile | 3 +++ 2 files changed, 5 insertions(+) create mode 100644 sysdeps/arm/bits/pagesize.h diff --git a/sysdeps/arm/bits/pagesize.h b/sysdeps/arm/bits/pagesize.h new file mode 100644 index 0000000000..cd688d3fb0 --- /dev/null +++ b/sysdeps/arm/bits/pagesize.h @@ -0,0 +1,2 @@ +#define __GLIBC_PAGE_SHIFT_MIN 12 +#define __GLIBC_PAGE_SHIFT_MAX 16 diff --git a/sysdeps/unix/sysv/linux/arm/Makefile b/sysdeps/unix/sysv/linux/arm/Makefile index a73c897f43..5f9e03978d 100644 --- a/sysdeps/unix/sysv/linux/arm/Makefile +++ b/sysdeps/unix/sysv/linux/arm/Makefile @@ -1,5 +1,8 @@ ifeq ($(subdir),elf) sysdep-rtld-routines += aeabi_read_tp libc-do-syscall +# The toolchain defaults to 4K pages even though compat mode on 64-bit +# kernels may require larger page sizes. +test-xfail-tst-load-alignment = yes endif ifeq ($(subdir),misc)