From patchwork Fri Jul 12 03:40:07 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeff Law X-Patchwork-Id: 1959670 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=ventanamicro.com header.i=@ventanamicro.com header.a=rsa-sha256 header.s=google header.b=MGEaUubw; dkim-atps=neutral Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=server2.sourceware.org; envelope-from=gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=patchwork.ozlabs.org) Received: from server2.sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4WKy6X2mYlz1xqc for ; Fri, 12 Jul 2024 13:40:36 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 07F113858C52 for ; Fri, 12 Jul 2024 03:40:33 +0000 (GMT) X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-oi1-x22e.google.com (mail-oi1-x22e.google.com [IPv6:2607:f8b0:4864:20::22e]) by sourceware.org (Postfix) with ESMTPS id 82A53385DDF3 for ; Fri, 12 Jul 2024 03:40:10 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org 82A53385DDF3 Authentication-Results: sourceware.org; dmarc=none (p=none dis=none) header.from=ventanamicro.com Authentication-Results: sourceware.org; spf=pass smtp.mailfrom=ventanamicro.com ARC-Filter: OpenARC Filter v1.0.0 sourceware.org 82A53385DDF3 Authentication-Results: server2.sourceware.org; arc=none smtp.remote-ip=2607:f8b0:4864:20::22e ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1720755612; cv=none; b=Jpdf2ozf4Fp3ThmglRX2zNg5KCqDkg/vr8VMiuyVKdgCsZ9s46K8KMXC8xlTWhUuztkgC8TYGdVb6ZY9S3bdLrVr7HpIz/Epg6wAb4kYqi8RMxpl7yXflLihtj1SxN5x/OUIva3LCUCrGzf61XtUu7I0V1utr0NZ5LydO4Wf4YA= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1720755612; c=relaxed/simple; bh=aRLs1J9ZMv+8R6RJ0gnSzHwrFepVzhvQGKvfTwhN72A=; h=DKIM-Signature:Message-ID:Date:MIME-Version:From:Subject:To; b=nJ/eb8Bcl2orE1ZEHsSQyEz5qYav349m5bFzFo9MIUqnCQFCk223QiBoHc/SADqUAydtcce4dpFm/eyq25t9DZsCSRS8QASY7rITm+02uRugpTbbOl+IErqH+xVWveFvPZA+KqMi2Ttlo/mwcgK9zhOO9oMPvUsTYMKxD4RjId8= ARC-Authentication-Results: i=1; server2.sourceware.org Received: by mail-oi1-x22e.google.com with SMTP id 5614622812f47-3d9c4887533so898170b6e.2 for ; Thu, 11 Jul 2024 20:40:10 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1720755609; x=1721360409; darn=gcc.gnu.org; h=to:subject:from:content-language:user-agent:mime-version:date :message-id:from:to:cc:subject:date:message-id:reply-to; bh=LK4EUb384WhNdnEK0xtdvzsoPmsbzLBN6xxExJxbmeI=; b=MGEaUubw3tAgegfliSRPo8SN/jii9Tkbn/2gOp4yghOi0yAO1dQHItxYKA6q1LYqFR nq33LpTzYrfcV/U4XWUUnbvcazDJ3el+kyWVaESh50npdQQqidSTEM1ACA41GVkXsvXz Ye80tLQv/2oXMM4gLa/wrfwlWLDNnWya0upX1JsfHvEKxDASTslpmdjuhSdsIunhEjvS PuhWoINqD+aKB4hCr/esnHdQfL64SftOcbq/8Geg15a+eehHBcN2WsC6YKerGyl21tov I33qp0Sa2O2LwRBCrpZXaLbdgTuGLSzBWadOPmmG0jslOduwO62aNBT5iOtkYRwTjYlz rEFw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1720755609; x=1721360409; h=to:subject:from:content-language:user-agent:mime-version:date :message-id:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=LK4EUb384WhNdnEK0xtdvzsoPmsbzLBN6xxExJxbmeI=; b=FgAzomNp7lQmMf4bQIQvBA0xOtjwIwrVYqzFQTcjc4g34NiUkfOaWhPGDQT8/ikFjy vG/ByTdoBf7PMmDuCh0h999639/KwVm7QVawxRyBlw2aESlG+Me8QiT+KX91l1B/jVQZ C/ojJ8DzOnb3SiRABCaKKs9PpDrekufzJw52TX6R9+p/b9QA2qUKedwNd/mJaJeQwwsi ZpZqNSR06YPz7GM011kx4odSlEiNeaY0pTy7T9bMUlUhQx07etatVUWX46fhL80COJpd 173qtjSKozNs2eQ5GuIJO9eWKtz6B70ddL4S1x4RShcjLjLIC38DtDKLH5IQ/yUCrBn0 O8BQ== X-Gm-Message-State: AOJu0Yy4nwxCx3dKHBcBnJGaxydur5x1dHjZ311pyQsOCTNyhczTIf6i bEYAPyxj1r9kqMGJ3fNFz3i9a4xIi/7mfC+X5RRKcoTnvL2Ve1s8tzSRm5RqugN5ShpLJHoJBwZ t X-Google-Smtp-Source: AGHT+IHbNp9nJPoSxQIt2lEGB0T/4NtGmKcQL7RNI1PTdYMQQYR5d5+h32KK1hfXSjJAm2UGOScHLA== X-Received: by 2002:a05:6808:bcb:b0:3d9:2ac4:5d63 with SMTP id 5614622812f47-3d93c021450mr11966890b6e.25.1720755609066; Thu, 11 Jul 2024 20:40:09 -0700 (PDT) Received: from [172.31.0.109] ([136.36.72.243]) by smtp.gmail.com with ESMTPSA id 5614622812f47-3daab602fd4sm100233b6e.57.2024.07.11.20.40.08 for (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 11 Jul 2024 20:40:08 -0700 (PDT) Message-ID: <367e45d1-8ac9-4d4d-8509-0eedfd16ff7b@ventanamicro.com> Date: Thu, 11 Jul 2024 21:40:07 -0600 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Beta Content-Language: en-US From: Jeff Law Subject: [committed] Fix m68k bootstrap segfault with late-combine To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-11.1 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org So the m68k port has failed to bootstrap since the introduction of late-combine. My suspicion has been this is a backend problem. Sure enough after bisecting things down (thank goodness for the debug counter!) I'm happy to report m68k will bootstrap, though it's failing the comparison check. Basically late-combine propagated an address calculation to its use points, generating this insn (dwarf2out.c, I forget what function): > (insn 653 652 655 (parallel [ > (set (mem/j:DI (plus:SI (plus:SI (reg/f:SI 9 %a1 [orig:64 _67 ] [64]) > (reg:SI 0 %d0 [321])) > (const_int 20 [0x14])) [0 slot_204->dw_attr_val.v.val_unsigned+0 S8 A16]) > (sign_extend:DI (mem/c:SI (plus:SI (reg/f:SI 14 %a6) > (const_int -28 [0xffffffffffffffe4])) [870 %sfp+-28 S4 A16]))) > (clobber (reg:SI 0 %d0)) > ]) "../../../gcc/gcc/dwarf2out.cc":24961:23 93 {extendsidi2} > (expr_list:REG_DEAD (reg/f:SI 9 %a1 [orig:64 _67 ] [64]) > (expr_list:REG_DEAD (reg:SI 0 %d0 [321]) > (expr_list:REG_UNUSED (reg:SI 0 %d0) > (nil))))) Note how the output uses d0 in the address calculation and the clobber uses d0. It matches this insn in the md file: > (define_insn "extendsidi2" > [(set (match_operand:DI 0 "nonimmediate_operand" "=d,o,o,<") > (sign_extend:DI > (match_operand:SI 1 "nonimmediate_src_operand" "rm,rm,r,rm"))) > (clobber (match_scratch:SI 2 "=X,&d,&d,&d"))] > "" > { > if (which_alternative == 0) > /* Handle alternative 0. */ > { > if (TARGET_68020 || TARGET_COLDFIRE) > return "move%.l %1,%R0\;smi %0\;extb%.l %0"; > else > return "move%.l %1,%R0\;smi %0\;ext%.w %0\;ext%.l %0"; > } > > /* Handle alternatives 1, 2 and 3. We don't need to adjust address by 4 > in alternative 3 because autodecrement will do that for us. */ > operands[3] = adjust_address (operands[0], SImode, > which_alternative == 3 ? 0 : 4); > operands[0] = adjust_address (operands[0], SImode, 0); > > if (TARGET_68020 || TARGET_COLDFIRE) > return "move%.l %1,%3\;smi %2\;extb%.l %2\;move%.l %2,%0"; > else > return "move%.l %1,%3\;smi %2\;ext%.w %2\;ext%.l %2\;move%.l %2,%0"; > } > [(set_attr "ok_for_coldfire" "yes,no,yes,yes")]) Note the smi/ext instruction pair in the case for alternatives 1..3. Those clobber the scratch register before we're done consuming inputs. The scratch register really needs to be marked as an earlyclobber. That fixes the bootstrap segfault. We've still got a comparison failure, but it's definitely a step in the right direction. jeff diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md index 037978db40c..e5c25288844 100644 --- a/gcc/config/m68k/m68k.md +++ b/gcc/config/m68k/m68k.md @@ -1887,7 +1887,7 @@ (define_insn "extendsidi2" [(set (match_operand:DI 0 "nonimmediate_operand" "=d,o,o,<") (sign_extend:DI (match_operand:SI 1 "nonimmediate_src_operand" "rm,rm,r,rm"))) - (clobber (match_scratch:SI 2 "=X,d,d,d"))] + (clobber (match_scratch:SI 2 "=X,&d,&d,&d"))] "" { if (which_alternative == 0)