diff mbox series

[committed] Fix m68k bootstrap segfault with late-combine

Message ID 367e45d1-8ac9-4d4d-8509-0eedfd16ff7b@ventanamicro.com
State New
Headers show
Series [committed] Fix m68k bootstrap segfault with late-combine | expand

Commit Message

Jeff Law July 12, 2024, 3:40 a.m. UTC 
So the m68k port has failed to bootstrap since the introduction of 
late-combine.  My suspicion has been this is a backend problem.  Sure 
enough after bisecting things down (thank goodness for the debug 
counter!) I'm happy to report m68k  will bootstrap, though it's failing 
the comparison check.

Basically late-combine propagated an address calculation to its use 
points, generating this insn (dwarf2out.c, I forget what function):

> (insn 653 652 655 (parallel [
>             (set (mem/j:DI (plus:SI (plus:SI (reg/f:SI 9 %a1 [orig:64 _67 ] [64])
>                             (reg:SI 0 %d0 [321]))
>                         (const_int 20 [0x14])) [0 slot_204->dw_attr_val.v.val_unsigned+0 S8 A16])
>                 (sign_extend:DI (mem/c:SI (plus:SI (reg/f:SI 14 %a6)
>                             (const_int -28 [0xffffffffffffffe4])) [870 %sfp+-28 S4 A16])))
>             (clobber (reg:SI 0 %d0))
>         ]) "../../../gcc/gcc/dwarf2out.cc":24961:23 93 {extendsidi2}
>      (expr_list:REG_DEAD (reg/f:SI 9 %a1 [orig:64 _67 ] [64])
>         (expr_list:REG_DEAD (reg:SI 0 %d0 [321])
>             (expr_list:REG_UNUSED (reg:SI 0 %d0)
>                 (nil)))))

Note how the output uses d0 in the address calculation and the clobber 
uses d0.

It matches this insn in the md file:

> (define_insn "extendsidi2"
>   [(set (match_operand:DI 0 "nonimmediate_operand" "=d,o,o,<")
>         (sign_extend:DI 
>          (match_operand:SI 1 "nonimmediate_src_operand" "rm,rm,r<Q>,rm")))
>    (clobber (match_scratch:SI 2 "=X,&d,&d,&d"))]
>   "" 
> {     
>   if (which_alternative == 0)
>     /* Handle alternative 0.  */
>     {
>       if (TARGET_68020 || TARGET_COLDFIRE)
>         return "move%.l %1,%R0\;smi %0\;extb%.l %0";
>       else
>         return "move%.l %1,%R0\;smi %0\;ext%.w %0\;ext%.l %0";
>     }
>   
>   /* Handle alternatives 1, 2 and 3.  We don't need to adjust address by 4
>      in alternative 3 because autodecrement will do that for us.  */
>   operands[3] = adjust_address (operands[0], SImode,
>                                 which_alternative == 3 ? 0 : 4);
>   operands[0] = adjust_address (operands[0], SImode, 0);
>   
>   if (TARGET_68020 || TARGET_COLDFIRE)
>     return "move%.l %1,%3\;smi %2\;extb%.l %2\;move%.l %2,%0";
>   else
>     return "move%.l %1,%3\;smi %2\;ext%.w %2\;ext%.l %2\;move%.l %2,%0";
> } 
>   [(set_attr "ok_for_coldfire" "yes,no,yes,yes")])

Note the smi/ext instruction pair in the case for alternatives 1..3. 
Those clobber the scratch register before we're done consuming inputs. 
The scratch register really needs to be marked as an earlyclobber.

That fixes the bootstrap segfault.  We've still got a comparison 
failure, but it's definitely a step in the right direction.



jeff
diff mbox series

Patch

diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md
index 037978db40c..e5c25288844 100644
--- a/gcc/config/m68k/m68k.md
+++ b/gcc/config/m68k/m68k.md
@@ -1887,7 +1887,7 @@  (define_insn "extendsidi2"
   [(set (match_operand:DI 0 "nonimmediate_operand" "=d,o,o,<")
 	(sign_extend:DI
 	 (match_operand:SI 1 "nonimmediate_src_operand" "rm,rm,r<Q>,rm")))
-   (clobber (match_scratch:SI 2 "=X,d,d,d"))]
+   (clobber (match_scratch:SI 2 "=X,&d,&d,&d"))]
   ""
 {
   if (which_alternative == 0)