| Message ID | 20250122132707.138900-1-xry111@xry111.site |
|---|---|
| State | New |
| Headers | show |
| Series | LoongArch: Fix invalid subregs in xorsign [PR118501] | expand |
在 2025/1/22 下午9:26, Xi Ruoyao 写道: > The test case added in r15-7073 now triggers an ICE, indicating we need > the same fix as AArch64. > > gcc/ChangeLog: > > PR target/118501 > * config/loongarch/loongarch.md (@xorsign<mode>3): Use > force_lowpart_subreg. > --- > > Bootstrapped and regtested on loongarch64-linux-gnu, ok for trunk? LGTM! Here we try to use force_lowpart_subreg when can_create_pseudo_p () is true, right? > > gcc/config/loongarch/loongarch.md | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md > index 0325994ebd6..04a9a79d548 100644 > --- a/gcc/config/loongarch/loongarch.md > +++ b/gcc/config/loongarch/loongarch.md > @@ -1343,8 +1343,8 @@ (define_expand "@xorsign<mode>3" > machine_mode lsx_mode > = <MODE>mode == SFmode ? V4SFmode : V2DFmode; > rtx tmp = gen_reg_rtx (lsx_mode); > - rtx op1 = lowpart_subreg (lsx_mode, operands[1], <MODE>mode); > - rtx op2 = lowpart_subreg (lsx_mode, operands[2], <MODE>mode); > + rtx op1 = force_lowpart_subreg (lsx_mode, operands[1], <MODE>mode); > + rtx op2 = force_lowpart_subreg (lsx_mode, operands[2], <MODE>mode); > emit_insn (gen_xorsign3 (lsx_mode, tmp, op1, op2)); > emit_move_insn (operands[0], > lowpart_subreg (<MODE>mode, tmp, lsx_mode));
On Thu, 2025-01-23 at 11:21 +0800, Lulu Cheng wrote: > > 在 2025/1/22 下午9:26, Xi Ruoyao 写道: > > The test case added in r15-7073 now triggers an ICE, indicating we need > > the same fix as AArch64. > > > > gcc/ChangeLog: > > > > PR target/118501 > > * config/loongarch/loongarch.md (@xorsign<mode>3): Use > > force_lowpart_subreg. > > --- > > > > Bootstrapped and regtested on loongarch64-linux-gnu, ok for trunk? > > LGTM! > > Here we try to use force_lowpart_subreg when can_create_pseudo_p () is > true, right? As this is a define_expand, can_create_pseudo_p should be just true (it turns to false when the reload pass starts, and reload is far after expand). I'm pushing the patch into master now. > > gcc/config/loongarch/loongarch.md | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md > > index 0325994ebd6..04a9a79d548 100644 > > --- a/gcc/config/loongarch/loongarch.md > > +++ b/gcc/config/loongarch/loongarch.md > > @@ -1343,8 +1343,8 @@ (define_expand "@xorsign<mode>3" > > machine_mode lsx_mode > > = <MODE>mode == SFmode ? V4SFmode : V2DFmode; > > rtx tmp = gen_reg_rtx (lsx_mode); > > - rtx op1 = lowpart_subreg (lsx_mode, operands[1], <MODE>mode); > > - rtx op2 = lowpart_subreg (lsx_mode, operands[2], <MODE>mode); > > + rtx op1 = force_lowpart_subreg (lsx_mode, operands[1], <MODE>mode); > > + rtx op2 = force_lowpart_subreg (lsx_mode, operands[2], <MODE>mode); > > emit_insn (gen_xorsign3 (lsx_mode, tmp, op1, op2)); > > emit_move_insn (operands[0], > > lowpart_subreg (<MODE>mode, tmp, lsx_mode)); >
在 2025/1/23 上午11:36, Xi Ruoyao 写道: > On Thu, 2025-01-23 at 11:21 +0800, Lulu Cheng wrote: >> 在 2025/1/22 下午9:26, Xi Ruoyao 写道: >>> The test case added in r15-7073 now triggers an ICE, indicating we need >>> the same fix as AArch64. >>> >>> gcc/ChangeLog: >>> >>> PR target/118501 >>> * config/loongarch/loongarch.md (@xorsign<mode>3): Use >>> force_lowpart_subreg. >>> --- >>> >>> Bootstrapped and regtested on loongarch64-linux-gnu, ok for trunk? >> LGTM! >> >> Here we try to use force_lowpart_subreg when can_create_pseudo_p () is >> true, right? > As this is a define_expand, can_create_pseudo_p should be just true (it > turns to false when the reload pass starts, and reload is far after > expand). Um, that's not what I meant. What I meant is that in future code implementation, if can_create_pseudo_p is satisfied, we will not use lowpart_subreg but use force_lowpart_subreg. > > I'm pushing the patch into master now. >>> gcc/config/loongarch/loongarch.md | 4 ++-- >>> 1 file changed, 2 insertions(+), 2 deletions(-) >>> >>> diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md >>> index 0325994ebd6..04a9a79d548 100644 >>> --- a/gcc/config/loongarch/loongarch.md >>> +++ b/gcc/config/loongarch/loongarch.md >>> @@ -1343,8 +1343,8 @@ (define_expand "@xorsign<mode>3" >>> machine_mode lsx_mode >>> = <MODE>mode == SFmode ? V4SFmode : V2DFmode; >>> rtx tmp = gen_reg_rtx (lsx_mode); >>> - rtx op1 = lowpart_subreg (lsx_mode, operands[1], <MODE>mode); >>> - rtx op2 = lowpart_subreg (lsx_mode, operands[2], <MODE>mode); >>> + rtx op1 = force_lowpart_subreg (lsx_mode, operands[1], <MODE>mode); >>> + rtx op2 = force_lowpart_subreg (lsx_mode, operands[2], <MODE>mode); >>> emit_insn (gen_xorsign3 (lsx_mode, tmp, op1, op2)); >>> emit_move_insn (operands[0], >>> lowpart_subreg (<MODE>mode, tmp, lsx_mode));
diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md index 0325994ebd6..04a9a79d548 100644 --- a/gcc/config/loongarch/loongarch.md +++ b/gcc/config/loongarch/loongarch.md @@ -1343,8 +1343,8 @@ (define_expand "@xorsign<mode>3" machine_mode lsx_mode = <MODE>mode == SFmode ? V4SFmode : V2DFmode; rtx tmp = gen_reg_rtx (lsx_mode); - rtx op1 = lowpart_subreg (lsx_mode, operands[1], <MODE>mode); - rtx op2 = lowpart_subreg (lsx_mode, operands[2], <MODE>mode); + rtx op1 = force_lowpart_subreg (lsx_mode, operands[1], <MODE>mode); + rtx op2 = force_lowpart_subreg (lsx_mode, operands[2], <MODE>mode); emit_insn (gen_xorsign3 (lsx_mode, tmp, op1, op2)); emit_move_insn (operands[0], lowpart_subreg (<MODE>mode, tmp, lsx_mode));